KR0134461B1 - First-in/first-out memory device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a first-in, first-out memory device for a stack. A first-in, first-out memory device having a write pointer means for designating a position to be written while being increased, and a read pointer means for designating a position to be read as the address is increased by one when reading data from the memory means. Combined with the first-in-first-out, the stack is characterized in that it is an optional read pointer means for sharing the first-in first-out method and the last-in first-out method by the control signal for selecting the input-output method in order to use the memory means as the last-in first-out input / output method. First in, first out memory device The ball.

Description

Stackable First In First Out Memory Device

1 is a conceptual block diagram of a stack-first-in first-out memory device according to the present invention.

2 is a block diagram of a stack-first-in first-out memory device controlling a read pointer according to a preferred embodiment of the present invention.

3 is a conceptual block diagram of a conventional typical first-in first-out memory device.

* Explanation of symbols for main parts of the drawings

10: control logic 20: counter

30: counter register 40: write pointer

50: second read pointer 60: adder

70: first read pointer 80: multiplexer

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a stack combined first-in first-out memory device. In particular, the stack combined first-in, first-out first-in, first-out and first-in-first (FIRST IN FIRST OU T) input / output system can be used in combination. Relates to a memory device.

In general, a typical first-in, first-out memory device of the type as shown in FIG.

In the figure, the write pointer 10 and the read pointer 20 are types of registers having addresses of data for inputting / outputting from the memory 30, and the write pointer 10 writes to the memory 30 next. It has an address, and the read pointer 20 has the next address to read from the memory 30.

The data input buffer 40 and the data output buffer 50 are also means for temporarily storing data to be written to or read from the memory 30.

However, in the implementation of an ATM (ASYNCHRONOUS TRANSFER MODE) terminal, in order to process header information in a memory, a last-in-first-out method of input / output of a stack is required. That is, there is a problem that it is inconvenient to freely use the last-in, first-out input / output method.

Accordingly, an object of the present invention is to solve a problem of the prior art as described above, and to provide a stack-first-in first-out memory device capable of combining first-in first-out and last-in first-out.

In order to achieve the above object, the present invention provides a memory means for storing data, a temporary storage means for inputting and outputting data to and from the memory means, and a position to write with increasing address by one when writing data to the memory means. A first-in, first-out memory device having a write pointer means for designating and a read pointer means for designating a position to be read as the address is increased by one when reading data from the memory means, wherein the read pointer means is used in combination with first-in-first-out. In order to use the memory means as a last-in, first-out input / output method, a stack-first-in first-out first memory device characterized in that it is an optional read pointer means capable of sharing the first-in first-out method and the last-in first-out method by a control signal for selecting an input / output method. to provide.

The selective read pointer means may further include: a control logic unit configured to control the overall selective read pointer means by inputting a read signal and a write signal as the control signal and a stack signal for selectively using the memory device as a stack; A counter that counts up data input for a stack based on a control signal from the control logic unit, counts down when a read operation is performed for the stack, and the counter based on a control signal from the control logic unit. A counter register which downloads and stores the number of data input for the stack before downcounting the counter, and loads and stores the value of the write pointer means based on a control signal from the control logic section, and reads a stack pointer. A second read pointer that performs address decrement by one, The read signal is applied to the control logic unit so that, in the first-in, first-out read operation, an address is increased by one based on a control signal from the control logic unit, and has a next read address having a next read address; When a signal is applied and the value of the first read pointer and the second read pointer are the same in the first-in first-out read operation, the value of the counter register and the value of the counter register are adjusted to adjust the first read pointer for the memory portion used for the stack. An adder for adding the value of the first read pointer to the first read pointer, and a multiplexer for selectively outputting the first read pointer and the second read pointer according to a selection signal from the control logic unit. .

Other objects and various advantages of the present invention will become more apparent from the preferred embodiments of the present invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a conceptual block diagram of a stack-first-in first-out memory device according to the present invention. As shown in the drawing, the present invention distinguishes and manages the first read pointer 30 for the first in, first out and the second read pointer 40 for the last in, first out as the read pointer. As will be described in more detail below.

2 is a block diagram of a stack first-in first-out memory device that controls a read pointer according to a preferred embodiment of the present invention. As shown in the drawing, the present invention includes the control logic unit 10, the counter 20, the counter register 30, the write pointer 40, the second read pointer 50, the adder 60, and the first. A read pointer 70 and a multiplexer 80.

In the figure, the control logic section 10 controls a pointer for reading a memory by inputting a read signal and a write signal and optionally a stack signal for using the memory device as a stack.

The counter 20 counts up data input for the stack by applying a write signal and a stack signal to the control logic unit 10, that is, when the read operation is performed for the stack, that is, the control logic unit 10. The countdown is performed again when the read signal and the stack signal are applied.

In addition, when outputting in a first-in, first-out manner, the counter register 30 sets the number of data input for the stack before the counter 20 counts down to adjust the first read pointer by the number of data used for the stack. Download and remember.

On the other hand, the write pointer 40 has an address in the memory to be stored next in the write operation. The address is increased by one for each write operation. In particular, the write pointer 40 controls the write signal and the stack signal. When applied to the logic unit 10, the value of the write pointer 40 is loaded into the second read pointer 50 to manage the second read pointer 50.

The second read pointer 50 receives a write signal and a stack signal from the control logic unit 10 and loads and stores the value of the write pointer 40 during an input operation for the stack. ), The stored address is decremented one by one until the read signal and the stack signal are applied to the stack for each output operation.

In addition, the adder 60 is used for the stack when a read signal is applied to the control logic unit 10 so that the value of the first read pointer 70 and the second read pointer 50 are the same in the first-in first-out output operation. In order to adjust the first read pointer 70 for the memory part, the value of the counter register 30 and the value of the first read pointer 70 are added and output to the first read pointer 70.

On the other hand, the first read pointer 70 has a read signal applied to the control logic unit 10 to increase the address one by one in the first-in first-out read operation to have the next read address.

The multiplexer 80 selectively outputs the first read pointer 70 and the second read pointer 50 according to the selection signal from the control logic unit 10.

Next, the operation process of the present invention having the constituent members as described above will be described in detail.

First, when a write signal WR is applied to the control logic unit 10 to perform a write operation, data is stored at an address indicated by the write pointer 40 and the write pointer 40 is increased by one.

Next, when the stack signal STACK is applied to the control logic unit 10 after the continuous write operation is performed, after the write operation is performed to manage the second read pointer 50 that is the stack pointer, the write pointer is performed. The value of 40 is loaded into the second read pointer 50, the write pointer 40 is incremented, and the counter 20 is further configured to control the number of data input for the stack. The count starts according to the control signal from the.

Therefore, when data is input for the stack, the second read pointer 50 has the address value of the data last input for the stack, the number of data input for the counter 20 stack, and the counter register. 30 also has the number of data input for the stack for the adjustment of the first read pointer.

When only the write signal WR is applied and the input operation is performed, the values of the second read pointer 50 and the counter 20 are not changed and only the write pointer 40 is incremented one by one to perform the write operation.

Next, when the read signal RD and the stack signal STACK are applied to the control logic unit 10 and the output operation is performed, the output method of the stack is last-in, first-out, so that the value of the current second read pointer 50 is stacked. For example, since the address of the last data input is located, the data indicated by the current second read pointer 50 is output, and the second read pointer 50 decreases by one address, and at the same time, the counter 20 It is operated by the control logic section 10 to count down. Next, if the value of the counter 20 reaches 0, the output of the data input for the stack is completed. The output of the last-in first-out method is terminated, and the first-in-first-out method is output again.

At this time, the second read pointer 50 has the address of the last data input in a first-in first-out manner before being input for the stack, the counter 20 has a value of 0 and the counter register 30 is input for the stack. It contains the number of data collected.

Next, when only the read signal RD is applied to the control logic unit 10 to perform a read operation in a first-in first-out manner, the first read pointer 70 is increased to perform the first read pointer 70 and the second. If the value of the read pointer 50 is the same, the first read pointer 70 and the counter register 30 increased by one address to skip the portion of memory used for the stack and adjust the first read pointer 70. Is added to the adder 60 and loaded into the first read pointer 70 to continue the read operation.

On the other hand, during the read operation, selectively based on the selection signal generated by the control logic unit 10 among the first-in first-out first read pointer 70 and the second-in first-out read pointer 50 controlled as described above. The multiplexer 80 selectively outputs the result.

As described above, according to the present invention, there is an effect that the first-in, first-out memory device can be used as a stack, that is, the first-in, first-out method as needed.

Claims (2)

Memory means for storing data, temporary storage means for inputting and outputting data to and from the memory means, write pointer means for designating a writing position by incrementing an address when data is written to the memory means, and writing data to the memory; In the first-in, first-out memory device having a read pointer means for designating a read position as the address is increased by one when reading from the means, wherein the read pointer means uses the memory means as a last-in first-out input / output method in combination with first-in-first-out. And an optional read pointer means for sharing the first-in first-out method and the last-in first-out method by a control signal for selecting an input / output method. The method of claim 1, wherein the selective read pointer means controls the selective read pointer means as a whole by inputting a read signal, a write signal, which is the control signal, and a stack signal for selectively using the memory device as a stack. A control logic section; A counter for counting up data input for a stack based on a control signal from the control logic unit and counting down when a read operation is performed for the stack; A counter register which downloads and stores the number of data input for the stack before down counting in the counter based on a control signal from the control logic section; A second read pointer configured to receive and store a value of the write pointer means based on a control signal from the control logic unit and to perform an address decrease by one with a stack read pointer; A first read pointer having the next read address by applying the read signal to the control logic unit so that an address is increased by one based on a control signal from the control logic unit during a first-in first-out read operation; When the read signal is applied to the control logic unit and adjusts the first read pointer for the memory portion used for the stack when the value of the first read pointer and the second read pointer are the same in the first-in first-out read operation. An adder for adding the value of the counter register and the value of the first read pointer to output the first read pointer; And a multiplexer for selectively outputting the first read pointer and the second read pointer according to a selection signal from the control logic unit.