KR0130382B1 - Metalizing method of semiconductor device - Google Patents

Abstract

A fabrication method of metal wires is provided to improve step coverage using copper as metal wires having a mechanical hardness and tolerance of etching. The method comprises the steps of: forming an interlayer insulator(2) on a semiconductor substrate(1); forming a contact hole by selective etching the interlayer insulator(2); forming copper layer(3) on the resultant structure; forming a PR pattern(4); ion-implanting S2+ and O2+ ions into the exposed copper layer(3); forming CuSO4 layer(10) by RTA(rapid thermal annealing) the exposed copper layer(3); and forming a metal wire(3a) by etching the CuSO4 layer(10) to NH4OH solvent. Thereby, it is possible to easily form copper wire having mechanical hardness.

Description

Metal wiring formation method of semiconductor device

1 is a cross-sectional view of a conventional wiring.

2 (A) to (B) are cross-sectional views of a wiring forming step of the present invention.

* Explanation of symbols for main parts of the drawings

1: semiconductor substrate 2: interlayer insulating film

3: copper layer 3a: metal wiring

4: photosensitive film pattern 10: CuSO ₄ layer.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to metal wiring, and more particularly, to a method for forming metal wiring of a semiconductor device suitable for forming wiring using copper.

Hereinafter, with reference to the accompanying drawings, a conventional metal wiring forming method will be described.

1 is a cross-sectional view of a conventional metal wiring forming process. In the metal wiring forming process, first, an element is formed in a selected region of a semiconductor substrate 1, and then a gate electrode of a transistor for connecting a source and a drain to an upper layer is connected with an upper side. After the interlayer insulating film 2 is formed as an insulating material for insulating, the interlayer insulating film 2 is selectively patterned by a photo-etching process to form a contact hole, and a wiring metal (Al) or a silicide metal or the like is formed on the entire surface. Is formed by CVD (Chemical Vapor Deposition) method or sputtering method.

Subsequently, the wiring metal is patterned by a photo-etching process to form the metal wiring 20.

However, when aluminum (Al) is used as the metal wire 20 in the conventional technology as described above, aluminum has a high resistivity of 2.62 [㏁-cm] at 20 ° C., which is disadvantageous for electrical conductivity and also has a tensile strength of 17. If the difference in thermal expansion coefficient between the semiconductor substrate and the package material is small due to [kg / ㎣], there is a high possibility of causing mechanical breakdown, and the self-expansion coefficient is expensive to obtain aluminum of high purity and impurities (for example, Si, Cu ), The conductivity decreases linearly.

In addition, aluminum causes electrochemical corrosion when contacted with other metals, and also reacts with phosphoric acid (H ₃ PO ₄ ) to cause corrosion, resulting in disconnection, and has a low melting point. There was a problem such as being limited.

The present invention has been made to solve the problems of the prior art as described above, the object is to form a metal wiring using copper.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to realize the above object.

2 (A) to (B) show a process cross-sectional view for explaining an embodiment of the present invention, after fabricating an element on the semiconductor substrate 1 as shown in FIG. After forming the secondary metal wiring, an interlayer insulating film 2 is formed on the entire surface to insulate the lower layer and the upper side, and the contact hole is formed by patterning the region selected by the photo-etching process. After the formation, the copper layer 3 is deposited on the entire surface as a wiring metal by CVD or sputtering.

Subsequently, the photoresist is coated on the entire surface, and a photo process is performed to form a photoresist pattern 4 by forming a photoresist pattern 4 by forming a photoresist pattern on the upper side of the contact hole and leaving a predetermined width on both sides. ) S ²⁺ to an implantation energy of ^{50Kev ~ 5MeV 1 × 10 16Atom /} ㎝ -3 concentration ion implantation is followed by more, ²⁺ O to 4 × 10 ^16Atom / ㎝ to ^-3 or more concentration ion implantation or the SO ₂ in the ^{+ Is} ion implanted at a concentration of at least SO ₂ ²⁺ .

In this case, Cu, S, and O are non-stoichiometrically present in the copper layer 3 into which impurity ions are implanted.

Next, the photoresist pattern 4 is removed and a sample is heat-treated at a temperature of 850 to 1000 ° C. with a rapid thermal annealing (RTA) device.

At this time, the copper layer 3 doped with impurity ions is formed by switching to CuSO ₄ layer 10, and the excess S and O atoms for the reaction are outgassing in the form of SO ₂ (sulfur dioxide) or O ₂ . Becomes

Subsequently, as illustrated in FIG. 2B, the CuSO ₄ layer 10 is removed using DI water or NH ₄ OH solution to form the metal wiring 3a.

Here, the process of removing CuSO ₄ by pure water is as follows.

That is, when the semiconductor substrate on which CuSO ₄ is formed is placed in H ₂ O (DI Water), CuSO ₄ dissociates into Cu ¹² and SO ₄ ² to remove CuSO ₄ formed on the semiconductor substrate.

Also, in a solution other than pure water, that is, NH ₄ OH solution, when the semiconductor substrate on which CuSO ₄ is formed is placed, NH ₄ OH is separated into (NH ₄ ) ₂ SO ₄ and Cu (OH) ₂ , and finally CuSO ₄ is formed. Removed.

In the above process, the copper layer 3 may be used as a primary metal wiring, a secondary metal wiring, and a tertiary metal wiring.

As another embodiment of the present invention, after forming the copper layer 3 and depositing an oxide film on the copper etched (3), to form a photosensitive film pattern (4) and ion implanted S ²⁺ with high ion implantation energy The oxygen ions may be recoiled into the copper layer 3 to form the CuSO ₄ layer 10.

In the present invention as described above in the formation of CuSO ₄ layer (10) the reaction scheme is as follows.

When the S ²⁺ and O ²⁺ ions are injected into the copper layer (3),

Cu + S + 4 → CuSO ₄

The reaction equation for SO ₂ ion implantation is

Cu + 2SO ₂ → CuSO ₄ + S (gas)

to be.

In the present invention as described above, the copper used as the metal wiring 3a has a very small resistivity of 1.68 [㏁-cm] at 20 ° C., and only about 60% of the thickness of aluminum is sufficient, so the staff for the upper layer film may be formed. Since the coverage can be improved, the coefficient of thermal expansion is small, and the tensile strength is large, it is strong in mechanical breakdown, thereby improving the reliability of the device.

Claims (4)

Forming an insulating film on a semiconductor substrate, forming a copper layer with a wiring metal on the insulating film, injecting sulfur and oxygen ions into a selected region of the copper layer, and heat treating the copper layer to And changing the copper sulphate implanted with oxygen ions into a copper sulphate layer, and removing the copper sulphate layer. The method of claim 1, wherein the step of injecting sulfur and oxygen ions into the copper layer comprises forming a photoresist pattern on the copper layer, and using oxygen and sulfur ions in the copper layer using the photoresist pattern as an ion implantation mask. The metal wiring forming method of the semiconductor device further comprising the step of implanting. According to claim 1, S ²⁺ is a semiconductor element, characterized in that the ion implantation of 1 × 10 ^16Atom / ㎝ concentration ^-3 or more, and the ion implantation to a concentration on the ^{O 2+ 4 × 10 16Atom / ㎝} -3 this Metal wiring formation method. The method of claim 1, wherein the temperature for heat treating the copper layer is about 850 ° C. to about 1000 ° C. 6.