KR0119965B1 - Oxidation method of semiconductor device - Google Patents
Oxidation method of semiconductor deviceInfo
- Publication number
- KR0119965B1 KR0119965B1 KR1019940011479A KR19940011479A KR0119965B1 KR 0119965 B1 KR0119965 B1 KR 0119965B1 KR 1019940011479 A KR1019940011479 A KR 1019940011479A KR 19940011479 A KR19940011479 A KR 19940011479A KR 0119965 B1 KR0119965 B1 KR 0119965B1
- Authority
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- Prior art keywords
- oxide film
- gas
- semiconductor device
- forming
- temperature
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
제1a도 내지 제1c도는 본 발명에 의한 반도체 소자의 산화막 형성방법을 설명하기 위해 도시한 단면도.1A to 1C are cross-sectional views for explaining the oxide film forming method of a semiconductor device according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 실리콘 기판 2 : 산화막(Sio2)1: Silicon Substrate 2: Oxide Film (Sio 2 )
3 : 경계막(SiXOYNZ)3: boundary film (Si X O Y N Z )
본 발명은 반도체 소자의 산화막 형성방법에 관한 것으로, 특히 반도체 소자의 제조공정중 게이트 산화막 또는 층간 절연 산화막을 형성함에 있어, LPCVD 장비에서 CVD 방식으로 SiH4개스와 N2O 개스를 이용하여 어닐링(annealing)을 진행함으로써 양질의 산화막을 얻을 수 있는 반도체 소자의 산화막 형성방법에 관한 것이다.The present invention relates to a method for forming an oxide film of a semiconductor device, and in particular, in forming a gate oxide film or an interlayer insulating oxide film during a semiconductor device manufacturing process, annealing using SiH 4 gas and N 2 O gas by CVD in an LPCVD apparatus ( The present invention relates to a method for forming an oxide film of a semiconductor device in which a good oxide film can be obtained by annealing.
최근 반도체 소자가 고집적화 되어가면서 트랜지스터의 게이트 산화막의 두께도 점점 감소되고, 이에 따라 산화막 자체의 품질뿐만 아니라 산화막과 실리콘 기판사이의 계면에 대한 품질도 중요한 문제로 대두되고 있다.In recent years, as the semiconductor devices have been highly integrated, the thickness of the gate oxide film of the transistor is gradually reduced. Accordingly, not only the quality of the oxide film itself but also the quality of the interface between the oxide film and the silicon substrate has become an important problem.
종래의 게이트 산화막은 고온의 확산로에서 대기압 상태로 O2개스를 이용하여 실리콘기판을 열산화시켜서 형성하였다.The conventional gate oxide film was formed by thermally oxidizing a silicon substrate using O 2 gas at atmospheric pressure in a high temperature diffusion path.
이러한 실리콘의 열산화 방식에서는 실리콘기판의 소모가 수반되면서 실리콘 기판과 산화막 사이의 경계면에서 거친(Roughness)상태가 증가하게 되고 산화막의 전기적 특성의 열화를 가져왔다. 실리콘 기판과 산화막 사이의 계면특성은 반도체 소자가 고집적화 될수록 점점 중요하게 되는데, 기존의 열산화 방식으로는 상기한 바와 같은 전기적 특성의 열화로 고집적 소자에서의 적용이 어렵다.In the thermal oxidation method of silicon, as the silicon substrate is consumed, roughness is increased at the interface between the silicon substrate and the oxide film and the electrical properties of the oxide film are deteriorated. The interfacial characteristics between the silicon substrate and the oxide film become more important as the semiconductor device is highly integrated. However, the conventional thermal oxidation method is difficult to apply to the highly integrated device due to the deterioration of the electrical properties as described above.
따라서, 본 발명은 실리콘 기판과 산화막 사이의 경계면에서 거친 상태가 유발되는 것을 방지하면서 양질의 산화막을 형성할 수 있도록 하여 고집적 소자에 적용할 수 있는 반도체 소자의 산화막을 형성하는 방법을 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming an oxide film of a semiconductor device that can be applied to a highly integrated device by forming a high quality oxide film while preventing a rough state from occurring at the interface between the silicon substrate and the oxide film. There is this.
이러한 목적을 달성하기 위한 본 발명의 산화막 형성방법은 증착장비 내부를 소정의 온도와 저압상태로 하고, SiH4개스와 N2O 개스를 동시에 주입하면서 CVD 방식으로 소정의 기판상에 산화막(2)을 증착시키는 단계와, 상기 단계로부터 SiH4개스 주입을 중단하고, 소정의 온도로 상승시킨 후 N2O 개스만을 계속 주입하면서 상기 증착된 산화막(2)을 어닐링하는 단계로 이루어지는 것을 특징으로 한다.The oxide film forming method of the present invention for achieving this purpose is to put the inside of the deposition equipment at a predetermined temperature and low pressure state, the oxide film (2) on a predetermined substrate by the CVD method while simultaneously injecting SiH 4 gas and N 2 O gas And depositing SiH 4 gas from the step, and raising the temperature to a predetermined temperature, followed by annealing the deposited oxide film 2 while continuing to inject only N 2 O gas.
이하, 본 발명을 첨부된 도면을 참조하여 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제1a도 내지 제1c도는 본 발명에 의한 반도체 소자의 산화막 형성방법을 설명하기 위해 도시한 단면도로서, 제1a도는 소정의 실리콘 기판(1)상에 게이트 산화막과 같은 산화막을 형성할 웨이퍼를 증착장비내에 장착한 다음, 증착장비내를 1Torr 미만의 저압상태와 700~800oC 온도 범위로 하고, SiH4개스와 N2O 개스를 동시에 주입하여 이들 개스의 화학반응으로 생성된 SiO2가 실리콘 기판(1)에 증착되면서 소정 두께의 산화막(2)을 형성한 상태를 도시한 것이다.1A to 1C are cross-sectional views illustrating a method of forming an oxide film of a semiconductor device according to the present invention, and FIG. 1A is a deposition apparatus for depositing a wafer to form an oxide film such as a gate oxide film on a predetermined silicon substrate 1. Then, the inside of the deposition equipment is a low-pressure state of less than 1 Torr and a temperature range of 700 ~ 800 ° C, SiH 4 gas and N 2 O gas is injected at the same time, the SiO 2 silicon substrate produced by the chemical reaction of these gases The state in which the oxide film 2 of predetermined thickness is formed while depositing on (1) is shown.
상기 증착장비는 LPCVD 장비이며, 이 LPCVD 장비에서 상기 산화막(2)은 열산화 방식이 아닌 CVD 방식으로 형성된다.The deposition apparatus is an LPCVD apparatus, in which the oxide film 2 is formed by a CVD method rather than a thermal oxidation method.
제1b도는 상기 SiH4개스의 주입을 중단하고 동일한 증착장비에서 온도를 800~900oC로 하여 N2O 개스만을 계속 주입하면서 상기 산화막(2)을 어닐링하는 상태를 도시한 것이다.FIG. 1B illustrates a state in which the oxide film 2 is annealed while stopping the injection of the SiH 4 gas and continuously injecting only N 2 O gas at a temperature of 800 to 900 ° C. in the same deposition apparatus.
상기 어닐링이 진행되는 과정에서 질소이온(Nitrogen Ion)이 산화막(2) 내부로 확산되며, 이때 불완전한 본드(Bond) 구조를 갖는 산화막(2)은 조밀화(Densify)와 산화막 구조 개선이 동시에 일어난다.Nitrogen ion is diffused into the oxide film 2 during the annealing process, and at this time, the oxide film 2 having an incomplete bond structure densifies and improves the oxide film structure.
제1c도는 상기 산화막(2) 어닐링 공정에 의해 확산된 질소이온이 산화막(2)과 실리콘 기판(1) 사이의 경계면에 SiXOYNZ구조의 경계막(3)을 형성하며, 이후 N2개스를 이용하여 증착장비내를 대기압 상태로한 후 꺼낸 상태를 도시한 것이다.FIG. 1C shows a boundary film 3 having a structure of Si X O Y N Z formed on the interface between the oxide film 2 and the silicon substrate 1 by the nitrogen ions diffused by the oxide film 2 annealing process. It shows the state which took out after making the inside of a vapor deposition apparatus into atmospheric pressure using 2 gas.
첨부된 도면을 참조하여 설명한 상기 실시예는 게이트 산화막과 같이 실리콘 기판상에 산화막을 형성하는 경우를 설명한 것이다.The embodiment described with reference to the accompanying drawings has described a case where an oxide film is formed on a silicon substrate like a gate oxide film.
한편, 상술한 산화막 형성방법은 폴리실리콘과 폴리실리콘 사이의 층간 절연산화막을 형성할 때에도 적용할 수 있는데, 종래에는 LPCVD 장비에서 CVD 산화막을 증착시킨 후 별도의 확산로에서 어닐링을 실시하였으나, 상술한 본 발명의 방법을 적용하면 CVD 산화막을 증착시킨 후 연속적으로 N2O 개스를 이용하여 어닐링을 실시함으로써 2개의 장비에서 웨이퍼를 이동하면서 진행할 때 유발되는 파티클 오염 등을 최소화 할 수 있으며 설비의 단축을 이룰 수 있다.On the other hand, the above-described oxide film forming method can be applied to form an interlayer dielectric oxide film between polysilicon and polysilicon, conventionally after the deposition of the CVD oxide film in the LPCVD equipment, but the annealing was performed in a separate diffusion furnace, By applying the method of the present invention, by depositing a CVD oxide film and continuously performing annealing using N 2 O gas, particle contamination caused by moving wafers in two devices can be minimized and equipment shortened. Can be achieved.
상술한 바와 같이 SiH4개스와 N2O 개스를 이용하여 LPCVD 장비에서 CVD 방식으로 산화막을 형성함으로써 실리콘 기판과 산화막 사이의 경계면에서 거친 상태 증가를 가져오는 실리콘 기판의 소모를 방지하여 양질의 산화막 형성이 가능하고, 산화막 증착이 끝난 후 동일한 장비에서 N2O 개스를 이용하여 어닐링을 진행함으로써 별도의 설비의 추가가 없이 양질의 산화막 형성이 가능하다.As described above, by forming an oxide film by CVD method in an LPCVD apparatus using SiH 4 gas and N 2 O gas, a high quality oxide film is formed by preventing the consumption of the silicon substrate, which leads to an increase in the rough state at the interface between the silicon substrate and the oxide film. This is possible, and annealing using N 2 O gas in the same equipment after the oxide film deposition is completed, it is possible to form a good oxide film without the addition of additional equipment.
또한, 어닐링이 진행되는 과정에서 증착된 산화막의 조밀화가 일어나며, 동시에 질소이온이 산화막을 통하여 확산되면서 산화막 내부의 불완전한 본드구조를 연결하는 역할을 할뿐만 아니라 산화막과 실리콘 기판사이의 경계면에서 SiXOYNZ구조의 새로운 막이 형성되어 산화막의 양질화가 가능하다.In addition, densification of the deposited oxide film occurs during the annealing process, and at the same time, as nitrogen ions diffuse through the oxide film, not only the incomplete bond structure inside the oxide film is connected, but also Si X O at the interface between the oxide film and the silicon substrate. A new film having a Y N Z structure is formed, and quality of the oxide film can be improved.
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940011479A KR0119965B1 (en) | 1994-05-26 | 1994-05-26 | Oxidation method of semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019940011479A KR0119965B1 (en) | 1994-05-26 | 1994-05-26 | Oxidation method of semiconductor device |
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| Publication Number | Publication Date |
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| KR950034595A KR950034595A (en) | 1995-12-28 |
| KR0119965B1 true KR0119965B1 (en) | 1997-10-17 |
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| KR1019940011479A KR0119965B1 (en) | 1994-05-26 | 1994-05-26 | Oxidation method of semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100332129B1 (en) * | 1995-12-29 | 2002-11-07 | 주식회사 하이닉스반도체 | Method for forming oxide layer in semiconductor device |
| KR100282413B1 (en) * | 1996-10-24 | 2001-03-02 | 김영환 | Thin film formation method using nitrous oxide gas |
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