JPWO2024219283A1 - - Google Patents

Info

Publication number
JPWO2024219283A1
JPWO2024219283A1 JP2025515175A JP2025515175A JPWO2024219283A1 JP WO2024219283 A1 JPWO2024219283 A1 JP WO2024219283A1 JP 2025515175 A JP2025515175 A JP 2025515175A JP 2025515175 A JP2025515175 A JP 2025515175A JP WO2024219283 A1 JPWO2024219283 A1 JP WO2024219283A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2025515175A
Other languages
Japanese (ja)
Other versions
JPWO2024219283A5 (https=
JP7806969B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024219283A1 publication Critical patent/JPWO2024219283A1/ja
Publication of JPWO2024219283A5 publication Critical patent/JPWO2024219283A5/ja
Application granted granted Critical
Publication of JP7806969B2 publication Critical patent/JP7806969B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2025515175A 2023-04-20 2024-04-09 多層回路基板 Active JP7806969B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2023069295 2023-04-20
JP2023069295 2023-04-20
PCT/JP2024/014334 WO2024219283A1 (ja) 2023-04-20 2024-04-09 多層回路基板

Publications (3)

Publication Number Publication Date
JPWO2024219283A1 true JPWO2024219283A1 (https=) 2024-10-24
JPWO2024219283A5 JPWO2024219283A5 (https=) 2025-10-29
JP7806969B2 JP7806969B2 (ja) 2026-01-27

Family

ID=93152385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025515175A Active JP7806969B2 (ja) 2023-04-20 2024-04-09 多層回路基板

Country Status (5)

Country Link
US (1) US20260032812A1 (https=)
JP (1) JP7806969B2 (https=)
CN (1) CN121128325A (https=)
DE (1) DE112024001377T5 (https=)
WO (1) WO2024219283A1 (https=)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237233A (ja) * 2005-02-24 2006-09-07 Ngk Spark Plug Co Ltd 複合配線基板構造体及びその製造方法
JP2010123830A (ja) * 2008-11-21 2010-06-03 Panasonic Corp プリント配線板とその製造方法
JP2019080034A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
WO2020122156A1 (ja) * 2018-12-13 2020-06-18 株式会社村田製作所 樹脂多層基板、および樹脂多層基板の製造方法
WO2022202322A1 (ja) * 2021-03-26 2022-09-29 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237233A (ja) * 2005-02-24 2006-09-07 Ngk Spark Plug Co Ltd 複合配線基板構造体及びその製造方法
JP2010123830A (ja) * 2008-11-21 2010-06-03 Panasonic Corp プリント配線板とその製造方法
JP2019080034A (ja) * 2017-10-20 2019-05-23 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
WO2020122156A1 (ja) * 2018-12-13 2020-06-18 株式会社村田製作所 樹脂多層基板、および樹脂多層基板の製造方法
WO2022202322A1 (ja) * 2021-03-26 2022-09-29 株式会社村田製作所 配線基板、積層基板及び配線基板の製造方法

Also Published As

Publication number Publication date
US20260032812A1 (en) 2026-01-29
CN121128325A (zh) 2025-12-12
WO2024219283A1 (ja) 2024-10-24
DE112024001377T5 (de) 2026-01-08
JP7806969B2 (ja) 2026-01-27

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