JPWO2024053333A1 - - Google Patents

Info

Publication number
JPWO2024053333A1
JPWO2024053333A1 JP2024545516A JP2024545516A JPWO2024053333A1 JP WO2024053333 A1 JPWO2024053333 A1 JP WO2024053333A1 JP 2024545516 A JP2024545516 A JP 2024545516A JP 2024545516 A JP2024545516 A JP 2024545516A JP WO2024053333 A1 JPWO2024053333 A1 JP WO2024053333A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024545516A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024053333A1 publication Critical patent/JPWO2024053333A1/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D80/00Assemblies of multiple devices comprising at least one device covered by this subclass
    • H10D80/20Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups H10D1/00 - H10D48/00, e.g. assemblies comprising capacitors, power FETs or Schottky diodes
    • H10D80/251FETs covered by H10D30/00, e.g. power FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
JP2024545516A 2022-09-09 2023-08-09 Pending JPWO2024053333A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022143827 2022-09-09
PCT/JP2023/029164 WO2024053333A1 (ja) 2022-09-09 2023-08-09 半導体装置

Publications (1)

Publication Number Publication Date
JPWO2024053333A1 true JPWO2024053333A1 (https=) 2024-03-14

Family

ID=90191030

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024545516A Pending JPWO2024053333A1 (https=) 2022-09-09 2023-08-09

Country Status (3)

Country Link
US (1) US20250246534A1 (https=)
JP (1) JPWO2024053333A1 (https=)
WO (1) WO2024053333A1 (https=)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5655339B2 (ja) * 2010-03-26 2015-01-21 サンケン電気株式会社 半導体装置
JP6827776B2 (ja) * 2016-11-15 2021-02-10 ローム株式会社 半導体デバイス
JP7284566B2 (ja) * 2018-10-29 2023-05-31 ローム株式会社 半導体装置
JP7260224B2 (ja) * 2019-01-18 2023-04-18 ローム株式会社 半導体装置
JP7312604B2 (ja) * 2019-05-13 2023-07-21 ローム株式会社 半導体装置
JP2021190505A (ja) * 2020-05-27 2021-12-13 ローム株式会社 半導体装置
US20230245956A1 (en) * 2020-10-14 2023-08-03 Rohm Co., Ltd. Semiconductor module

Also Published As

Publication number Publication date
WO2024053333A1 (ja) 2024-03-14
US20250246534A1 (en) 2025-07-31

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