JPWO2023209871A1 - - Google Patents
Info
- Publication number
- JPWO2023209871A1 JPWO2023209871A1 JP2024517702A JP2024517702A JPWO2023209871A1 JP WO2023209871 A1 JPWO2023209871 A1 JP WO2023209871A1 JP 2024517702 A JP2024517702 A JP 2024517702A JP 2024517702 A JP2024517702 A JP 2024517702A JP WO2023209871 A1 JPWO2023209871 A1 JP WO2023209871A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Dicing (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/019104 WO2023209871A1 (ja) | 2022-04-27 | 2022-04-27 | ウエハ加工装置、半導体チップの製造方法および半導体チップ |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2023209871A1 true JPWO2023209871A1 (enrdf_load_stackoverflow) | 2023-11-02 |
Family
ID=88518362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024517702A Pending JPWO2023209871A1 (enrdf_load_stackoverflow) | 2022-04-27 | 2022-04-27 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPWO2023209871A1 (enrdf_load_stackoverflow) |
| TW (1) | TWI854607B (enrdf_load_stackoverflow) |
| WO (1) | WO2023209871A1 (enrdf_load_stackoverflow) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000323439A (ja) * | 1999-05-14 | 2000-11-24 | Tokyo Seimitsu Co Ltd | ダイシング装置 |
| JP2007235068A (ja) * | 2006-03-03 | 2007-09-13 | Tokyo Seimitsu Co Ltd | ウェーハ加工方法 |
| JP2010125488A (ja) * | 2008-11-28 | 2010-06-10 | Apic Yamada Corp | 切断装置 |
| JP2020061453A (ja) * | 2018-10-10 | 2020-04-16 | 株式会社ディスコ | パッケージ基板の加工方法 |
| JP2021153113A (ja) * | 2020-03-24 | 2021-09-30 | 株式会社ディスコ | 拡張装置及びデバイスチップの製造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7498630B2 (ja) * | 2020-09-11 | 2024-06-12 | ファスフォードテクノロジ株式会社 | ダイボンディング装置および半導体装置の製造方法 |
-
2022
- 2022-04-27 WO PCT/JP2022/019104 patent/WO2023209871A1/ja active Application Filing
- 2022-04-27 JP JP2024517702A patent/JPWO2023209871A1/ja active Pending
-
2023
- 2023-04-20 TW TW112114666A patent/TWI854607B/zh active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000323439A (ja) * | 1999-05-14 | 2000-11-24 | Tokyo Seimitsu Co Ltd | ダイシング装置 |
| JP2007235068A (ja) * | 2006-03-03 | 2007-09-13 | Tokyo Seimitsu Co Ltd | ウェーハ加工方法 |
| JP2010125488A (ja) * | 2008-11-28 | 2010-06-10 | Apic Yamada Corp | 切断装置 |
| JP2020061453A (ja) * | 2018-10-10 | 2020-04-16 | 株式会社ディスコ | パッケージ基板の加工方法 |
| JP2021153113A (ja) * | 2020-03-24 | 2021-09-30 | 株式会社ディスコ | 拡張装置及びデバイスチップの製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI854607B (zh) | 2024-09-01 |
| TW202347483A (zh) | 2023-12-01 |
| WO2023209871A1 (ja) | 2023-11-02 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240527 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20250722 |