JPWO2023170751A1 - - Google Patents
Info
- Publication number
- JPWO2023170751A1 JPWO2023170751A1 JP2022550241A JP2022550241A JPWO2023170751A1 JP WO2023170751 A1 JPWO2023170751 A1 JP WO2023170751A1 JP 2022550241 A JP2022550241 A JP 2022550241A JP 2022550241 A JP2022550241 A JP 2022550241A JP WO2023170751 A1 JPWO2023170751 A1 JP WO2023170751A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/009757 WO2023170751A1 (ja) | 2022-03-07 | 2022-03-07 | 半導体装置の製造方法および半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2023170751A1 true JPWO2023170751A1 (enExample) | 2023-09-14 |
| JPWO2023170751A5 JPWO2023170751A5 (enExample) | 2024-02-14 |
Family
ID=87936363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022550241A Pending JPWO2023170751A1 (enExample) | 2022-03-07 | 2022-03-07 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPWO2023170751A1 (enExample) |
| WO (1) | WO2023170751A1 (enExample) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6376351A (ja) * | 1986-09-18 | 1988-04-06 | Nec Corp | 多層配線の形成方法 |
| US6166439A (en) * | 1997-12-30 | 2000-12-26 | Advanced Micro Devices, Inc. | Low dielectric constant material and method of application to isolate conductive lines |
| JP2004354508A (ja) * | 2003-05-27 | 2004-12-16 | Seiko Epson Corp | 電気光学パネルの製造方法、電気光学パネルの製造プログラム及び電気光学パネルの製造装置、並びに電子機器の製造方法 |
| JP2005109452A (ja) * | 2003-09-12 | 2005-04-21 | Toshiba Corp | 半導体装置の製造方法 |
| JP2008300480A (ja) * | 2007-05-30 | 2008-12-11 | Konica Minolta Holdings Inc | 有機薄膜トランジスタ、有機薄膜トランジスタシート及び有機薄膜トランジスタの製造方法 |
| WO2009044659A1 (ja) * | 2007-10-05 | 2009-04-09 | Konica Minolta Holdings, Inc. | パターン形成方法 |
-
2022
- 2022-03-07 JP JP2022550241A patent/JPWO2023170751A1/ja active Pending
- 2022-03-07 WO PCT/JP2022/009757 patent/WO2023170751A1/ja not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6376351A (ja) * | 1986-09-18 | 1988-04-06 | Nec Corp | 多層配線の形成方法 |
| US6166439A (en) * | 1997-12-30 | 2000-12-26 | Advanced Micro Devices, Inc. | Low dielectric constant material and method of application to isolate conductive lines |
| JP2004354508A (ja) * | 2003-05-27 | 2004-12-16 | Seiko Epson Corp | 電気光学パネルの製造方法、電気光学パネルの製造プログラム及び電気光学パネルの製造装置、並びに電子機器の製造方法 |
| JP2005109452A (ja) * | 2003-09-12 | 2005-04-21 | Toshiba Corp | 半導体装置の製造方法 |
| JP2008300480A (ja) * | 2007-05-30 | 2008-12-11 | Konica Minolta Holdings Inc | 有機薄膜トランジスタ、有機薄膜トランジスタシート及び有機薄膜トランジスタの製造方法 |
| WO2009044659A1 (ja) * | 2007-10-05 | 2009-04-09 | Konica Minolta Holdings, Inc. | パターン形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023170751A1 (ja) | 2023-09-14 |
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