JPWO2023037847A5 - - Google Patents
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- JPWO2023037847A5 JPWO2023037847A5 JP2023546859A JP2023546859A JPWO2023037847A5 JP WO2023037847 A5 JPWO2023037847 A5 JP WO2023037847A5 JP 2023546859 A JP2023546859 A JP 2023546859A JP 2023546859 A JP2023546859 A JP 2023546859A JP WO2023037847 A5 JPWO2023037847 A5 JP WO2023037847A5
- Authority
- JP
- Japan
- Prior art keywords
- region
- semiconductor device
- source
- drain
- main surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021146137 | 2021-09-08 | ||
| PCT/JP2022/031398 WO2023037847A1 (ja) | 2021-09-08 | 2022-08-19 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2023037847A1 JPWO2023037847A1 (https=) | 2023-03-16 |
| JPWO2023037847A5 true JPWO2023037847A5 (https=) | 2024-05-29 |
Family
ID=85506539
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023546859A Pending JPWO2023037847A1 (https=) | 2021-09-08 | 2022-08-19 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20240204062A1 (https=) |
| JP (1) | JPWO2023037847A1 (https=) |
| CN (1) | CN117795687A (https=) |
| DE (1) | DE112022004276T5 (https=) |
| WO (1) | WO2023037847A1 (https=) |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002094049A (ja) * | 2000-09-11 | 2002-03-29 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| US20020149067A1 (en) * | 2001-04-12 | 2002-10-17 | Mitros Jozef C. | Isolated high voltage MOS transistor |
| JP5070693B2 (ja) * | 2005-11-11 | 2012-11-14 | サンケン電気株式会社 | 半導体装置 |
| JP2009038130A (ja) * | 2007-07-31 | 2009-02-19 | Mitsumi Electric Co Ltd | 横型ｍｏｓトランジスタ及びこれを用いた半導体装置 |
| US7851857B2 (en) * | 2008-07-30 | 2010-12-14 | Freescale Semiconductor, Inc. | Dual current path LDMOSFET with graded PBL for ultra high voltage smart power applications |
| JP5637188B2 (ja) | 2011-09-27 | 2014-12-10 | 株式会社デンソー | 横型素子を有する半導体装置 |
| WO2013075877A1 (en) | 2011-11-23 | 2013-05-30 | Crown Packaging Technology, Inc | Method for sealing a metal cans with peelable lids and device therefor |
| JP2014203970A (ja) * | 2013-04-04 | 2014-10-27 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| JP6550674B2 (ja) * | 2015-08-13 | 2019-07-31 | ローム株式会社 | 半導体装置 |
| JP7377147B2 (ja) | 2020-03-24 | 2023-11-09 | テルモ株式会社 | 台座及び保護キャップ組立体 |
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2022
- 2022-08-19 WO PCT/JP2022/031398 patent/WO2023037847A1/ja not_active Ceased
- 2022-08-19 JP JP2023546859A patent/JPWO2023037847A1/ja active Pending
- 2022-08-19 DE DE112022004276.1T patent/DE112022004276T5/de active Pending
- 2022-08-19 CN CN202280054850.2A patent/CN117795687A/zh active Pending
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2024
- 2024-02-29 US US18/592,203 patent/US20240204062A1/en active Pending