JPWO2023026383A1 - - Google Patents
Info
- Publication number
- JPWO2023026383A1 JPWO2023026383A1 JP2023543539A JP2023543539A JPWO2023026383A1 JP WO2023026383 A1 JPWO2023026383 A1 JP WO2023026383A1 JP 2023543539 A JP2023543539 A JP 2023543539A JP 2023543539 A JP2023543539 A JP 2023543539A JP WO2023026383 A1 JPWO2023026383 A1 JP WO2023026383A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12015—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising clock generation or timing circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50012—Marginal testing, e.g. race, voltage or current testing of timing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5002—Characteristic
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2021/031085 WO2023026383A1 (ja) | 2021-08-25 | 2021-08-25 | 半導体集積回路装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2023026383A1 true JPWO2023026383A1 (https=) | 2023-03-02 |
| JPWO2023026383A5 JPWO2023026383A5 (https=) | 2024-05-17 |
| JP7709075B2 JP7709075B2 (ja) | 2025-07-16 |
Family
ID=85321906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023543539A Active JP7709075B2 (ja) | 2021-08-25 | 2021-08-25 | 半導体集積回路装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US12499963B2 (https=) |
| JP (1) | JP7709075B2 (https=) |
| WO (1) | WO2023026383A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20240162895A1 (en) * | 2022-11-16 | 2024-05-16 | International Business Machines Corporation | Competing path ring-oscillator for direct measurement of a latch timing window parameters |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014010874A (ja) * | 2012-07-02 | 2014-01-20 | Fujitsu Semiconductor Ltd | リング発振器及び半導体装置 |
| JP2014150353A (ja) * | 2013-01-31 | 2014-08-21 | Fujitsu Semiconductor Ltd | リング発振器及び半導体装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2748865B2 (ja) * | 1994-09-27 | 1998-05-13 | 日本電気株式会社 | 出力回路 |
| JP2001101870A (ja) * | 1999-09-30 | 2001-04-13 | Fujitsu Ltd | 半導体集積回路 |
| JP2002009601A (ja) * | 2000-06-27 | 2002-01-11 | Fujitsu Ltd | 半導体集積回路および半導体集積回路の初期化方法 |
| JP3939208B2 (ja) * | 2002-06-24 | 2007-07-04 | 富士通株式会社 | 出力パルスサイクルを短くできるパルス発生回路 |
| JP2008219232A (ja) * | 2007-03-01 | 2008-09-18 | Matsushita Electric Ind Co Ltd | 半導体集積回路 |
| JP5200506B2 (ja) * | 2007-11-28 | 2013-06-05 | 富士通セミコンダクター株式会社 | メモリ装置 |
| JP2010073282A (ja) * | 2008-09-19 | 2010-04-02 | Nec Electronics Corp | 半導体装置、半導体装置の設計方法 |
| US10964379B2 (en) * | 2018-11-07 | 2021-03-30 | Arm Limited | Ring oscillator based bitcell delay monitor |
-
2021
- 2021-08-25 WO PCT/JP2021/031085 patent/WO2023026383A1/ja not_active Ceased
- 2021-08-25 JP JP2023543539A patent/JP7709075B2/ja active Active
-
2024
- 2024-02-22 US US18/584,725 patent/US12499963B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014010874A (ja) * | 2012-07-02 | 2014-01-20 | Fujitsu Semiconductor Ltd | リング発振器及び半導体装置 |
| JP2014150353A (ja) * | 2013-01-31 | 2014-08-21 | Fujitsu Semiconductor Ltd | リング発振器及び半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023026383A1 (ja) | 2023-03-02 |
| US20240233854A1 (en) | 2024-07-11 |
| US12499963B2 (en) | 2025-12-16 |
| JP7709075B2 (ja) | 2025-07-16 |
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