JPWO2022074750A1 - - Google Patents

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Publication number
JPWO2022074750A1
JPWO2022074750A1 JP2022555016A JP2022555016A JPWO2022074750A1 JP WO2022074750 A1 JPWO2022074750 A1 JP WO2022074750A1 JP 2022555016 A JP2022555016 A JP 2022555016A JP 2022555016 A JP2022555016 A JP 2022555016A JP WO2022074750 A1 JPWO2022074750 A1 JP WO2022074750A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2022555016A
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Japanese (ja)
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JPWO2022074750A5 (https=
JP7416279B2 (ja
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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • G06F30/27—Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Medical Informatics (AREA)
  • Artificial Intelligence (AREA)
  • Geometry (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
JP2022555016A 2020-10-06 2020-10-06 訓練データ生成プログラム、訓練データ生成方法及び訓練データ生成装置 Active JP7416279B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/037924 WO2022074750A1 (ja) 2020-10-06 2020-10-06 訓練データ生成プログラム、訓練データ生成方法及び訓練データ生成装置

Publications (3)

Publication Number Publication Date
JPWO2022074750A1 true JPWO2022074750A1 (https=) 2022-04-14
JPWO2022074750A5 JPWO2022074750A5 (https=) 2023-03-22
JP7416279B2 JP7416279B2 (ja) 2024-01-17

Family

ID=81125746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022555016A Active JP7416279B2 (ja) 2020-10-06 2020-10-06 訓練データ生成プログラム、訓練データ生成方法及び訓練データ生成装置

Country Status (4)

Country Link
US (1) US20230252356A1 (https=)
EP (1) EP4227848A4 (https=)
JP (1) JP7416279B2 (https=)
WO (1) WO2022074750A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021206323A1 (de) * 2021-06-21 2022-12-22 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Analyse einer elektrischen Schaltung
WO2025134410A1 (ja) * 2023-12-19 2025-06-26 株式会社デンソー 分析装置、分析プログラム、方法、半導体装置及び半導体ウエハ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09115101A (ja) * 1995-10-19 1997-05-02 Matsushita Electric Ind Co Ltd クロストーク現象解析装置及びこれを用いて最適化した回転トランス
CN103728535A (zh) * 2013-10-28 2014-04-16 昆明理工大学 一种基于小波变换暂态能量谱的特高压直流输电线路故障测距方法
JP2020060877A (ja) * 2018-10-05 2020-04-16 富士通株式会社 推定プログラム、推定装置および推定方法
WO2020095362A1 (ja) * 2018-11-06 2020-05-14 三菱電機株式会社 設計支援装置、設計支援方法および機械学習装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10706197B2 (en) * 2018-05-24 2020-07-07 Hitachi, Ltd. Automated electromagnetic interference filter design
US11704791B2 (en) 2018-08-30 2023-07-18 Topcon Corporation Multivariate and multi-resolution retinal image anomaly detection system
CN113207286B (zh) 2018-12-19 2023-04-25 松下知识产权经营株式会社 外观检查装置及使用该外观检查装置判定焊接部位有无形状不良及形状不良的种类的判定精度的提高方法、焊接系统及工件的焊接方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09115101A (ja) * 1995-10-19 1997-05-02 Matsushita Electric Ind Co Ltd クロストーク現象解析装置及びこれを用いて最適化した回転トランス
CN103728535A (zh) * 2013-10-28 2014-04-16 昆明理工大学 一种基于小波变换暂态能量谱的特高压直流输电线路故障测距方法
JP2020060877A (ja) * 2018-10-05 2020-04-16 富士通株式会社 推定プログラム、推定装置および推定方法
WO2020095362A1 (ja) * 2018-11-06 2020-05-14 三菱電機株式会社 設計支援装置、設計支援方法および機械学習装置

Also Published As

Publication number Publication date
EP4227848A1 (en) 2023-08-16
JP7416279B2 (ja) 2024-01-17
EP4227848A4 (en) 2023-11-22
WO2022074750A1 (ja) 2022-04-14
US20230252356A1 (en) 2023-08-10

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