JPWO2021149113A1 - - Google Patents
Info
- Publication number
- JPWO2021149113A1 JPWO2021149113A1 JP2021572135A JP2021572135A JPWO2021149113A1 JP WO2021149113 A1 JPWO2021149113 A1 JP WO2021149113A1 JP 2021572135 A JP2021572135 A JP 2021572135A JP 2021572135 A JP2021572135 A JP 2021572135A JP WO2021149113 A1 JPWO2021149113 A1 JP WO2021149113A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Complex Calculations (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2020/001742 WO2021149113A1 (ja) | 2020-01-20 | 2020-01-20 | プロセッサ、シミュレータプログラム、アセンブラプログラム、及び情報処理プログラム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2021149113A1 true JPWO2021149113A1 (https=) | 2021-07-29 |
| JPWO2021149113A5 JPWO2021149113A5 (https=) | 2022-07-20 |
| JP7315872B2 JP7315872B2 (ja) | 2023-07-27 |
Family
ID=76992115
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021572135A Active JP7315872B2 (ja) | 2020-01-20 | 2020-01-20 | プロセッサ、シミュレータプログラム、アセンブラプログラム、及び情報処理プログラム |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20220300288A1 (https=) |
| EP (1) | EP4095698A4 (https=) |
| JP (1) | JP7315872B2 (https=) |
| CN (1) | CN114830097A (https=) |
| WO (1) | WO2021149113A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119105799A (zh) * | 2023-06-08 | 2024-12-10 | 中兴通讯股份有限公司 | 代码分析方法、电子设备、计算机可读介质 |
| CN118519817B (zh) * | 2024-07-19 | 2024-10-29 | 浙江大华技术股份有限公司 | 一种算力cpu的异常数据获取方法、装置和计算机设备 |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63278147A (ja) * | 1987-05-11 | 1988-11-15 | Fujitsu Ltd | レジスタ誤使用防止制御方式 |
| JPS6461828A (en) * | 1987-09-01 | 1989-03-08 | Nec Corp | Register reference holding mechanism |
| JPH0748182B2 (ja) * | 1989-11-29 | 1995-05-24 | ブル・エイチエヌ・インフォメーション・システムズ・インコーポレーテッド | プログラム・エラー検出方法 |
| JP2000112757A (ja) * | 1998-10-02 | 2000-04-21 | Nec Corp | マイクロプロセッサ |
| US6185671B1 (en) * | 1998-03-31 | 2001-02-06 | Intel Corporation | Checking data type of operands specified by an instruction using attributes in a tagged array architecture |
| JP2002014809A (ja) * | 2000-06-28 | 2002-01-18 | Mitsubishi Electric Corp | マイクロプロセッサ並びにアセンブラ、その方法およびそのプログラムを記録した記録媒体 |
| US20050172109A1 (en) * | 2001-06-01 | 2005-08-04 | Microchip Technology Incorporated | Register pointer trap |
| US20050246696A1 (en) * | 2004-04-29 | 2005-11-03 | International Business Machines Corporation | Method and apparatus for hardware awareness of data types |
| US20080028262A1 (en) * | 2006-07-27 | 2008-01-31 | International Business Machines Corporation | Method and Data Processing System for Finding Problems Caused by Access to Uninitialized Data Storage in Assembler Programs |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4021655A (en) * | 1976-03-30 | 1977-05-03 | International Business Machines Corporation | Oversized data detection hardware for data processors which store data at variable length destinations |
| JPH0452734A (ja) * | 1990-06-14 | 1992-02-20 | Koufu Nippon Denki Kk | 汎用レジスタ例外検出回路 |
| JP2793396B2 (ja) | 1991-11-15 | 1998-09-03 | 株式会社東芝 | 電子計算機の演算ステータス保持装置 |
| JPH07262032A (ja) * | 1994-03-17 | 1995-10-13 | Fujitsu Ltd | 情報処理装置 |
| US6289445B2 (en) * | 1998-07-21 | 2001-09-11 | Lsi Logic Corporation | Circuit and method for initiating exception routines using implicit exception checking |
| DE19933130A1 (de) * | 1999-07-19 | 2001-01-25 | Giesecke & Devrient Gmbh | Operandenstapelspeicher und Verfahren zum Betreiben eines Operandenstapelspeichers |
| JP2004118419A (ja) * | 2002-09-25 | 2004-04-15 | Seiko Epson Corp | 半導体装置、マイクロコンピュータ、電子機器、半導体装置の制御方法 |
| JP6037034B2 (ja) * | 2013-09-25 | 2016-11-30 | 日産自動車株式会社 | ソフトウェア検査装置、ソフトウェア検査方法、ソフトウェア検査プログラム |
| US10296416B2 (en) * | 2016-07-02 | 2019-05-21 | Intel Corporation | Read from memory instructions, processors, methods, and systems, that do not take exception on defective data |
| KR102021447B1 (ko) * | 2018-04-06 | 2019-09-16 | 서울대학교산학협력단 | 컴퓨팅 장치 및 그것의 동작 방법 |
-
2020
- 2020-01-20 JP JP2021572135A patent/JP7315872B2/ja active Active
- 2020-01-20 WO PCT/JP2020/001742 patent/WO2021149113A1/ja not_active Ceased
- 2020-01-20 CN CN202080087002.2A patent/CN114830097A/zh active Pending
- 2020-01-20 EP EP20916133.0A patent/EP4095698A4/en not_active Withdrawn
-
2022
- 2022-06-07 US US17/833,933 patent/US20220300288A1/en not_active Abandoned
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63278147A (ja) * | 1987-05-11 | 1988-11-15 | Fujitsu Ltd | レジスタ誤使用防止制御方式 |
| JPS6461828A (en) * | 1987-09-01 | 1989-03-08 | Nec Corp | Register reference holding mechanism |
| JPH0748182B2 (ja) * | 1989-11-29 | 1995-05-24 | ブル・エイチエヌ・インフォメーション・システムズ・インコーポレーテッド | プログラム・エラー検出方法 |
| US6185671B1 (en) * | 1998-03-31 | 2001-02-06 | Intel Corporation | Checking data type of operands specified by an instruction using attributes in a tagged array architecture |
| JP2000112757A (ja) * | 1998-10-02 | 2000-04-21 | Nec Corp | マイクロプロセッサ |
| JP2002014809A (ja) * | 2000-06-28 | 2002-01-18 | Mitsubishi Electric Corp | マイクロプロセッサ並びにアセンブラ、その方法およびそのプログラムを記録した記録媒体 |
| US20050172109A1 (en) * | 2001-06-01 | 2005-08-04 | Microchip Technology Incorporated | Register pointer trap |
| US20050246696A1 (en) * | 2004-04-29 | 2005-11-03 | International Business Machines Corporation | Method and apparatus for hardware awareness of data types |
| US20080028262A1 (en) * | 2006-07-27 | 2008-01-31 | International Business Machines Corporation | Method and Data Processing System for Finding Problems Caused by Access to Uninitialized Data Storage in Assembler Programs |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114830097A (zh) | 2022-07-29 |
| WO2021149113A1 (ja) | 2021-07-29 |
| EP4095698A1 (en) | 2022-11-30 |
| US20220300288A1 (en) | 2022-09-22 |
| JP7315872B2 (ja) | 2023-07-27 |
| EP4095698A4 (en) | 2023-03-15 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220520 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20220520 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20230613 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20230626 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 7315872 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |