JPWO2020208457A1 - - Google Patents

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Publication number
JPWO2020208457A1
JPWO2020208457A1 JP2021513022A JP2021513022A JPWO2020208457A1 JP WO2020208457 A1 JPWO2020208457 A1 JP WO2020208457A1 JP 2021513022 A JP2021513022 A JP 2021513022A JP 2021513022 A JP2021513022 A JP 2021513022A JP WO2020208457 A1 JPWO2020208457 A1 JP WO2020208457A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2021513022A
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Japanese (ja)
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JP7518062B2 (ja
JPWO2020208457A5 (ja
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Publication of JPWO2020208457A1 publication Critical patent/JPWO2020208457A1/ja
Publication of JPWO2020208457A5 publication Critical patent/JPWO2020208457A5/ja
Priority to JP2024108011A priority Critical patent/JP7727805B2/ja
Application granted granted Critical
Publication of JP7518062B2 publication Critical patent/JP7518062B2/ja
Active legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H10P14/6923—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6518—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer
    • H10P14/6519—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer the substance being oxygen
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
JP2021513022A 2019-04-10 2020-03-30 半導体装置 Active JP7518062B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2024108011A JP7727805B2 (ja) 2019-04-10 2024-07-04 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019074781 2019-04-10
JP2019074781 2019-04-10
PCT/IB2020/052986 WO2020208457A1 (ja) 2019-04-10 2020-03-30 半導体装置、および半導体装置の作製方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2024108011A Division JP7727805B2 (ja) 2019-04-10 2024-07-04 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2020208457A1 true JPWO2020208457A1 (https=) 2020-10-15
JPWO2020208457A5 JPWO2020208457A5 (ja) 2023-04-05
JP7518062B2 JP7518062B2 (ja) 2024-07-17

Family

ID=72751136

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021513022A Active JP7518062B2 (ja) 2019-04-10 2020-03-30 半導体装置
JP2024108011A Active JP7727805B2 (ja) 2019-04-10 2024-07-04 半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2024108011A Active JP7727805B2 (ja) 2019-04-10 2024-07-04 半導体装置

Country Status (3)

Country Link
US (1) US12300484B2 (https=)
JP (2) JP7518062B2 (https=)
WO (1) WO2020208457A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023094941A1 (ja) * 2021-11-26 2023-06-01 株式会社半導体エネルギー研究所 半導体装置
WO2025078928A1 (ja) * 2023-10-13 2025-04-17 株式会社半導体エネルギー研究所 半導体装置

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170309732A1 (en) * 2016-04-22 2017-10-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US20180166578A1 (en) * 2016-12-09 2018-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US20180166392A1 (en) * 2016-12-09 2018-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
WO2018122659A1 (en) * 2016-12-27 2018-07-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
JP2018195814A (ja) * 2017-05-12 2018-12-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2018206841A (ja) * 2017-05-31 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2019003047A1 (ja) * 2017-06-27 2019-01-03 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019029666A (ja) * 2017-07-26 2019-02-21 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019033253A (ja) * 2017-08-04 2019-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101809105B1 (ko) 2010-08-06 2017-12-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 집적 회로
JP2016154225A (ja) * 2015-02-12 2016-08-25 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
TWI718125B (zh) * 2015-03-03 2021-02-11 日商半導體能源研究所股份有限公司 半導體裝置及其製造方法
WO2017006207A1 (en) * 2015-07-08 2017-01-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR102417846B1 (ko) 2016-12-21 2022-07-05 삼성전자주식회사 반도체 장치 제조 방법

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170309732A1 (en) * 2016-04-22 2017-10-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US20180166578A1 (en) * 2016-12-09 2018-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US20180166392A1 (en) * 2016-12-09 2018-06-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
WO2018122659A1 (en) * 2016-12-27 2018-07-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
US20190348537A1 (en) * 2016-12-27 2019-11-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
JP2018195814A (ja) * 2017-05-12 2018-12-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2018206841A (ja) * 2017-05-31 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2019003047A1 (ja) * 2017-06-27 2019-01-03 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019029666A (ja) * 2017-07-26 2019-02-21 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019033253A (ja) * 2017-08-04 2019-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

Also Published As

Publication number Publication date
JP2024133604A (ja) 2024-10-02
JP7518062B2 (ja) 2024-07-17
US20220189766A1 (en) 2022-06-16
JP7727805B2 (ja) 2025-08-21
WO2020208457A1 (ja) 2020-10-15
US12300484B2 (en) 2025-05-13

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