JPWO2011125874A1 - Mounting substrate and manufacturing method of mounting substrate - Google Patents

Mounting substrate and manufacturing method of mounting substrate Download PDF

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JPWO2011125874A1
JPWO2011125874A1 JP2012509589A JP2012509589A JPWO2011125874A1 JP WO2011125874 A1 JPWO2011125874 A1 JP WO2011125874A1 JP 2012509589 A JP2012509589 A JP 2012509589A JP 2012509589 A JP2012509589 A JP 2012509589A JP WO2011125874 A1 JPWO2011125874 A1 JP WO2011125874A1
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component
via conductor
substrate
mounting substrate
hole
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JP5436662B2 (en
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義弘 潮
義弘 潮
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Kyocera Corp
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/732—Location after the connecting process
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    • H01L2224/73265—Layer and wire connectors
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    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
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    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L2924/01—Chemical elements
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    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
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Abstract

【課題】 被実装体の発熱が比較低大きい場合でも、熱応力に伴って発生する絶縁基板とビア導体部との接合不良が比較的少ない実装基板を提供する。【解決手段】セラミックスを主成分とする、貫通孔を備えた絶縁性基板と、前記貫通孔内に配置されたビア導体と、を備えて構成された実装基板であって、前記ビア導体は、金属からなる第１成分と、前記ビア導体の内部に分散した、前記第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分とを含むことを特徴とする実装基板を提供する。PROBLEM TO BE SOLVED: To provide a mounting substrate with relatively little bonding failure between an insulating substrate and a via conductor portion caused by thermal stress even when the heat generation of a mounted body is relatively low. A mounting substrate comprising an insulating substrate having a through-hole, the main component of which is ceramics, and a via conductor disposed in the through-hole, wherein the via conductor includes: There is provided a mounting board comprising a first component made of metal and a second component made of a metal oxide having a thermal expansion coefficient lower than that of the first component dispersed inside the via conductor.

Description

本発明は、実装基板および実装基板の製造方法に関する。   The present invention relates to a mounting substrate and a manufacturing method of the mounting substrate.

従来より、一方主面の側に半導体チップ等を実装し、この半導体チップに他方主面の側から電流・電圧を供給する実装基板が用いられている。このような実装基板として、基板の一方主面から他方主面にかけて設けられたビア導体を供えているものがある。ビア導体は、基板の一方主面から他方主面にかけて貫通した貫通孔に、導電性部材が充填されて形成されている。このような実装基板では、ビア導体を介して、一方主面の側に実装された半導体チップに、電流が供給される。   Conventionally, a mounting substrate is used in which a semiconductor chip or the like is mounted on one main surface side, and current / voltage is supplied to the semiconductor chip from the other main surface side. As such a mounting substrate, there is a substrate provided with a via conductor provided from one main surface to the other main surface of the substrate. The via conductor is formed by filling a through hole penetrating from one main surface to the other main surface of the substrate with a conductive member. In such a mounting substrate, current is supplied to the semiconductor chip mounted on the one main surface side via the via conductor.

近年、電子機器の小型化に伴い、実装基板に要求されるビア導体の配線密度が高くなるとともに、ビア導体の径も比較的小さくなっている。比較的小さい径のビア導体が、比較的高い配線密度で配置された実装基板の一例が、例えば下記特許文献１に記載されている。   In recent years, along with miniaturization of electronic devices, the wiring density of via conductors required for a mounting substrate has increased, and the diameter of via conductors has also become relatively small. An example of a mounting substrate in which via conductors having a relatively small diameter are arranged with a relatively high wiring density is described in Patent Document 1 below, for example.

特許文献１に記載されている実装基板は、ビア導体の材料となる導体ペーストが充填された貫通孔を有するセラミックグリーンシートが積層された積層体を焼成して、ビア導体を備える実装基板を作製している。特許文献１に記載されている実装基板では、ビア導体に用いる導体ペーストとして、例えば銅粉末（融点約１０８３℃）１００質量部に、共材としてアルミニウム粉末（融点約６６０℃）を０．５質量部、ガラスを１５質量部加え、これに有機樹脂を４質量部、有機溶媒としてα−テルピネオール１０質量部を秤量したものを混練して調製したものを用いている。そして、ビア導体が形成されたセラミックグリーンシートを複数積層した後、アルミニウム粉末の融点よりも高く、かつ銅粉末の融点よりも低い、９１０℃の温度で１時間の焼成を行って多層配線基板を得ている。   The mounting substrate described in Patent Document 1 is a laminate in which a ceramic green sheet having a through hole filled with a conductive paste serving as a via conductor material is fired to produce a mounting substrate including a via conductor. doing. In the mounting substrate described in Patent Document 1, as the conductor paste used for the via conductor, for example, 100 parts by mass of copper powder (melting point: about 1083 ° C.), and 0.5 mass of aluminum powder (melting point: about 660 ° C.) as a co-material. Part, 15 parts by mass of glass, 4 parts by mass of organic resin and 10 parts by mass of α-terpineol as an organic solvent were kneaded and prepared. Then, after laminating a plurality of ceramic green sheets on which via conductors are formed, firing is performed at a temperature of 910 ° C. for 1 hour, which is higher than the melting point of the aluminum powder and lower than the melting point of the copper powder. It has gained.

特開２００５−１３６０４８号公報Japanese Patent Laid-Open No. 2005-136048

しかしながら、従来のグリーンシート法では、工程数も比較的多く、実装基板の製造にかかるコストが大きくなり易いといった課題がある。   However, the conventional green sheet method has a problem that the number of processes is relatively large, and the cost for manufacturing the mounting substrate tends to increase.

また、近年、例えば半導体チップの集積化に伴って、これら半導体チップから発する熱量も大きくなっている。また、半導体チップのみではなく、ＬＥＤなどの発光素子を実装する場合でも、発光素子からは比較的多くの熱が発生する。実装基板に配置されて、これら半導体チップや発光素子に直接接続するビア導体には、これらの発生した熱がよく伝わり、この熱によってビア導体およびセラミック基板が大きく膨張および収縮する。   In recent years, for example, with the integration of semiconductor chips, the amount of heat generated from these semiconductor chips has also increased. In addition, not only a semiconductor chip but also a light emitting element such as an LED is mounted, a relatively large amount of heat is generated from the light emitting element. The generated heat is well transmitted to the via conductors arranged on the mounting substrate and directly connected to these semiconductor chips and light emitting elements, and the via conductors and the ceramic substrate are greatly expanded and contracted by this heat.

特許文献１に記載されている実装基板では、ビア導体が、熱膨張係数が比較的高い銅を主成分とし、この銅よりも熱膨張係数が大きなアルミニウムを、さらに含有している。特許文献１に記載されているような、従来のグリーンシート法を用いて作製された実装基板では、セラミックスとビア導体との熱膨張係数差が比較的大きいので、発光素子等の発光に伴う発熱によって、セラミック基板とビア導体との境界部分で比較的大きな熱応力が発生してしまう。従来の実装基板では、比較的大きな熱を発生する、発光素子や半導体ＩＣ素子などの被実装体を実装した場合、セラミック基板からビア導体が剥離し易いといった課題があった。   In the mounting substrate described in Patent Document 1, the via conductor contains copper having a relatively high thermal expansion coefficient as a main component, and further contains aluminum having a larger thermal expansion coefficient than copper. In the mounting substrate manufactured by using the conventional green sheet method as described in Patent Document 1, the difference in thermal expansion coefficient between the ceramic and the via conductor is relatively large. As a result, a relatively large thermal stress is generated at the boundary between the ceramic substrate and the via conductor. The conventional mounting board has a problem that when a mounted body such as a light emitting element or a semiconductor IC element that generates relatively large heat is mounted, the via conductor is easily peeled off from the ceramic board.

本発明はかかる課題を解決するためになされたものである。   The present invention has been made to solve such problems.

上記課題を解決するため、本発明は、セラミックスを主成分とする、貫通孔を備えた絶縁性基板と、前記貫通孔内に配置されたビア導体と、を備えて構成された実装基板であって、前記ビア導体は、金属からなる第１成分と、前記ビア導体の内部に分散した、前記第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分とを含むことを特徴とする実装基板を提供する。   In order to solve the above-described problems, the present invention is a mounting substrate configured to include an insulating substrate having a through hole mainly composed of ceramics and a via conductor disposed in the through hole. The via conductor includes a first component made of metal and a second component made of a metal oxide having a thermal expansion coefficient lower than that of the first component dispersed inside the via conductor. A mounting substrate is provided.

また、実装基板の製造方法であって、セラミックスを主成分とする、貫通孔が設けられた絶縁性基板を準備し、前記絶縁性基板の前記貫通孔に、前記セラミックスよりも融点が低い金属からなる第１成分を主成分とする粒子と、前記第１成分よりも融点が高く、かつ前記第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分を主成分とする粒子とを含むペーストを充填し、前記ペーストが前記貫通孔の内部に充填された前記絶縁性基板を熱処理することを特徴とする実装基板の製造方法を、併せて提供する。   Also, a method for manufacturing a mounting substrate, comprising: preparing an insulating substrate having ceramics as a main component and provided with a through hole; and forming the through hole of the insulating substrate from a metal having a melting point lower than that of the ceramic. And a particle mainly composed of a second component composed of a metal oxide having a melting point higher than that of the first component and a thermal expansion coefficient lower than that of the first component. A mounting substrate manufacturing method is also provided, which includes filling a paste containing the paste and heat-treating the insulating substrate filled with the paste in the through hole.

本発明によれば、ビア導体は、金属からなる第１成分と、ビア導体の内部に分散した、第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分とを含んでおり、第２成分によってビア導体の熱膨張が抑制されるので、被実装体の発熱が比較的大きい場合でも、熱応力に伴って発生する絶縁基板とビア導体部との接合不良が比較的少ない。   According to the present invention, the via conductor includes a first component made of a metal and a second component made of a metal oxide having a coefficient of thermal expansion lower than that of the first component dispersed inside the via conductor. Since the thermal expansion of the via conductor is suppressed by the second component, even when the mounted body generates a relatively large amount of heat, there is relatively little bonding failure between the insulating substrate and the via conductor portion caused by the thermal stress.

本発明の実装基板の一実施形態を備えて構成される、本発明のデバイスの一実施形態である発光装置について説明する図であり、（ａ）は概略斜視図、（ｂ）は概略断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a figure explaining the light-emitting device which is one Embodiment of the device of this invention comprised including one Embodiment of the mounting board | substrate of this invention, (a) is a schematic perspective view, (b) is a schematic sectional drawing. It is. 図１（ｂ）の一部を拡大して示す図である。It is a figure which expands and shows a part of FIG.1 (b). 本実施形態の実装基板の一例の断面を示す図であり、（ａ）はビア導体の断面の走査型電子顕微鏡写真であり、（ｂ）〜（ｄ）は（ａ）断面に関するＥＰＭＡ分析画像である。It is a figure which shows the cross section of an example of the mounting board | substrate of this embodiment, (a) is a scanning electron micrograph of the cross section of a via conductor, (b)-(d) is an EPMA analysis image regarding (a) cross section. is there. 本発明の実装基板の他の実施形態を備えて構成される発光装置について説明する図であり、（ａ）は概略斜視図、（ｂ）は概略断面図である。It is a figure explaining the light-emitting device comprised by providing other embodiment of the mounting substrate of this invention, (a) is a schematic perspective view, (b) is a schematic sectional drawing. 図４（ｂ）の一部を拡大して示す図である。It is a figure which expands and shows a part of FIG.4 (b). （ａ）〜（ｅ）は、図に示す実装基板を製造する手順の一部を示す工程図である。(A)-(e) is process drawing which shows a part of procedure which manufactures the mounting substrate shown to a figure. （ａ）〜（ｂ）は、図１に示す実装基板を製造する手順の一部を示す工程図であり、図６(ａ)〜（ｅ）に続く工程について示している。(A)-(b) is process drawing which shows a part of procedure which manufactures the mounting substrate shown in FIG. 1, and has shown about the process following FIG. 6 (a)-(e).

以下、本発明の実施の形態について、図面を参照して説明する。なお、図面中、同一の要素には同一の符号を付し、重複する説明を省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとし、図面中の下方向が鉛直下向きに対応するものとする。また、図面の寸法比率は、図示の比率に限定されるものではない。また、以下の実施の形態は、本発明を説明するための例示であり、本発明をその実施の形態のみに限定する趣旨ではない。さらに、本発明は、その要旨を逸脱しない限り、さまざまな変形が可能である。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted. Further, the positional relationship such as up, down, left and right is based on the positional relationship shown in the drawings unless otherwise specified, and the downward direction in the drawing corresponds to the vertical downward direction. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios. Further, the following embodiments are exemplifications for explaining the present invention, and are not intended to limit the present invention only to the embodiments. Furthermore, the present invention can be variously modified without departing from the gist thereof.

図１は、本発明の実装基板の一実施形態である実装基板１０を備えて構成される、本発明のデバイスの一例である発光装置１について説明する図であり、（ａ）は発光装置１の概略斜視図、（ｂ）は発光装置１の概略断面図である。また、図２は、図１（ｂ）の一部を拡大して示す図である。   FIG. 1 is a diagram for explaining a light-emitting device 1 that is an example of a device of the present invention that includes a mounting substrate 10 that is an embodiment of the mounting substrate of the present invention. FIG. 2B is a schematic sectional view of the light emitting device 1. FIG. 2 is an enlarged view of a part of FIG.

発光装置１は、実装基板１０の一方主面１０Ａ側に、例えば公知のＬＥＤ素子である複数の発光素子２０が配置されている。   In the light emitting device 1, for example, a plurality of light emitting elements 20, which are known LED elements, are arranged on the one main surface 10 </ b> A side of the mounting substrate 10.

実装基板１０は、セラミックスを主成分とする、貫通孔１２ａを備えた絶縁性基板１２（以下、基板１２とする）と、貫通孔内１２ａ内に配置されたビア導体１４と、他方主面１０Ｂに形成されたパターン導体１６Ｂと、を備えて構成されている。   The mounting substrate 10 includes an insulating substrate 12 (hereinafter, referred to as a substrate 12) that includes ceramics as a main component and includes a through hole 12a, a via conductor 14 disposed in the through hole 12a, and the other main surface 10B. And a pattern conductor 16B formed on the substrate.

発光素子２０が配置された基板１２は、例えばアルミナを主成分とするセラミックスからなることが好ましい。アルミナは、ＬＥＤ素子からの発光に対して良好な反射性を有している。また、数ｍｍから１ｍｍ以下の微細な構造も、成型によって比較的容易に形成することができる。また、メタライズ技術や印刷配線技術を用い、表面に比較的容易にパターン導体１６Ｂを形成することもできる。これらの点でアルミナは、基板１２を構成する材質として好ましく用いられるが、その他のセラミック材料なども、用途に応じて用いることができ、基板１２の材質は特に限定されない。   The substrate 12 on which the light emitting element 20 is disposed is preferably made of ceramics mainly composed of alumina, for example. Alumina has good reflectivity for light emission from the LED element. In addition, a fine structure of several mm to 1 mm or less can be formed relatively easily by molding. Further, the pattern conductor 16B can be formed on the surface relatively easily by using a metallization technique or a printed wiring technique. In these respects, alumina is preferably used as a material constituting the substrate 12, but other ceramic materials can be used depending on the application, and the material of the substrate 12 is not particularly limited.

図１に示す実施形態では、２つのビア導体１４の組合せに対して、１つの発光素子２０が電気的に接続されている。各ビア導体１４の、他方主面１０Ｂの側の端面には所定のパターン導体１６Ｂが接続されている。また、ビア導体１４の、一方主面１０Ａの側は、接合層１３を介して発光素子２０の電極２１と接続されている。   In the embodiment shown in FIG. 1, one light emitting element 20 is electrically connected to a combination of two via conductors 14. A predetermined pattern conductor 16B is connected to the end surface of each via conductor 14 on the other main surface 10B side. The via conductor 14 has one main surface 10 </ b> A side connected to the electrode 21 of the light emitting element 20 through the bonding layer 13.

図２に示す実施形態の発光装置１では、発光素子２０の電極２１が、ビア導体１４の一方主面１０Ａ側の端面と対向するように配置され、発光素子２０の電極２１とビア導体１４とが、Ａｕ／Ｎｉメッキ層３１と半田層３２とが積層した接合層１３を介して接合されている。   In the light emitting device 1 of the embodiment shown in FIG. 2, the electrode 21 of the light emitting element 20 is disposed so as to face the end surface on the one main surface 10 </ b> A side of the via conductor 14, and the electrode 21 of the light emitting element 20 and the via conductor 14 Are bonded via the bonding layer 13 in which the Au / Ni plating layer 31 and the solder layer 32 are laminated.

なお、発光素子２０の実装には、発光素子２０とビア導体１４とが電気的に接続できる種々の方法を選択できる。例えば、実装方法として半田付け方法等を用いても構わない。   For mounting the light emitting element 20, various methods capable of electrically connecting the light emitting element 20 and the via conductor 14 can be selected. For example, a soldering method or the like may be used as a mounting method.

発光装置１では、実装基板１０の他方主面１０Ｂの側に設けられたパターン導体１６Ｂを介してビア導体１４に電圧が印加されて、ビア導体１４の一方主面１０Ａ側と接合した発光素子２０に、ビア導体１４を介して電流が供給される。発光素子２０は、ビア導体１４から供給されたこの電流によって発光する。   In the light emitting device 1, a voltage is applied to the via conductor 14 via the pattern conductor 16 </ b> B provided on the other main surface 10 </ b> B side of the mounting substrate 10, and the light emitting element 20 joined to the one main surface 10 </ b> A side of the via conductor 14. In addition, a current is supplied via the via conductor 14. The light emitting element 20 emits light by this current supplied from the via conductor 14.

ビア導体１４は、金属からなる第１成分を主成分とし、この第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分１８が、内部に分散している。本実施形態において第２成分１８は、酸化タングステン（ＷＯ３）からなる。このビア導体１４における第２成分１８の体積占有率は、実装基板１０の２つの主面のうち、発光素子２０が実装される側の一方主面１０Ａの側でより大きくなっている。また、ビア導体１４内には、第２成分１８とケイ素（Ｓｉ）と酸素（Ｏ）とを含有する低熱膨張領域が分散している。この低熱膨張領域の占める範囲については、明瞭には確定できないので図示はしていない。The via conductor 14 has a first component made of metal as a main component, and a second component 18 made of a metal oxide having a lower coefficient of thermal expansion than the first component is dispersed therein. In the present embodiment, the second component 18 is made of tungsten oxide (WO 3 ). The volume occupancy ratio of the second component 18 in the via conductor 14 is larger on the one main surface 10 </ b> A side on the side where the light emitting element 20 is mounted, out of the two main surfaces of the mounting substrate 10. In addition, a low thermal expansion region containing the second component 18, silicon (Si), and oxygen (O) is dispersed in the via conductor 14. The range occupied by the low thermal expansion region is not shown because it cannot be clearly determined.

本実施形態のビア導体１４では、第１成分が銅（Ｃｕ）であり、この銅（Ｃｕ）よりも熱膨張係数の小さい酸化タングステン（ＷＯ３）を第２成分として含有している。第２成分１８は、第１成分に比べて熱膨張係数が小さければよく、第１成分および第２成分１８の材質については、特に限定されない。In the via conductor 14 of the present embodiment, the first component is copper (Cu), and tungsten oxide (WO 3 ) having a smaller thermal expansion coefficient than the copper (Cu) is contained as the second component. The second component 18 only needs to have a smaller coefficient of thermal expansion than the first component, and the materials of the first component and the second component 18 are not particularly limited.

例えば、第２成分１８は、酸化タングステンＷＯ３の代わりに酸化モリブデン（ＭｏＯ３）を用いてもよい。または、第２成分１８として、酸化タングステン（ＷＯ３）と酸化モリブデン（ＭｏＯ３）とを用いてもよい。For example, the second component 18 may use molybdenum oxide (MoO 3 ) instead of tungsten oxide WO 3 . Alternatively, tungsten oxide (WO 3 ) and molybdenum oxide (MoO 3 ) may be used as the second component 18.

なお、本発明において「主成分として」含まれるとは、その成分の質量含有率が、５０質量％以上であることをいう。ビア導体１４では、第２成分１８およびその他の成分の合計に対し、第１成分である銅（Ｃｕ）がより多く（５０質量％以上）含まれている。   In the present invention, “included as a main component” means that the mass content of the component is 50% by mass or more. The via conductor 14 contains more copper (Cu) as the first component (50 mass% or more) with respect to the total of the second component 18 and other components.

なお、第２成分１８の体積占有率が、基板１０の２つの主面のうち、一方主面１０Ａの側でより大きくなっているとは、ビア導体１４を、一方主面１０Ａに略平行な仮想面で長さ方向（すなわち、基板１２の厚さ方向）に２等分した際、この仮想面から一方主面１０Ａまでの領域における第２成分１８の体積占有率が、この仮想面から他方主面１０Ｂまでの領域における第２成分１８の体積占有率よりも大きいことをいう。   The fact that the volume occupancy of the second component 18 is larger on the one main surface 10A side of the two main surfaces of the substrate 10 means that the via conductor 14 is substantially parallel to the one main surface 10A. When the virtual plane is equally divided into two in the length direction (that is, the thickness direction of the substrate 12), the volume occupancy of the second component 18 in the region from the virtual plane to the one main surface 10A is It means that it is larger than the volume occupation ratio of the second component 18 in the region up to the main surface 10B.

また、ビア導体１４における第２成分１８の位置および大きさは、例えばビア導体１４の断面を走査型電子顕微鏡写真で観察することで確認することができる。具体的には、断面写真の任意領域における第２成分１８の面積占有率を、そのままの値で、この任意領域における体積占有率に置き換えればよい。また、第１成分および第２成分の材質および組成は、公知のＥＰＭＡ（Ｅｌｅｃｔｒｏｎ Ｐｒｏｂｅ Ｍｉｃｒｏ Ａｎａｌｙｚｅｒ）装置や、ＸＰＳ（Ｘ−ｒａｙ Ｐｈｏｔｏｅｌｅｃｔｒｏｎ Ｓｐｅｃｔｒｏｓｃｏｐｙ）装置を用いて容易に確認することができる。   Moreover, the position and magnitude | size of the 2nd component 18 in the via conductor 14 can be confirmed by observing the cross section of the via conductor 14 with a scanning electron micrograph, for example. Specifically, the area occupancy ratio of the second component 18 in an arbitrary area of the cross-sectional photograph may be replaced with the volume occupancy ratio in the arbitrary area as it is. The materials and compositions of the first component and the second component can be easily confirmed using a known EPMA (Electron Probe Micro Analyzer) apparatus or XPS (X-ray Photoelectron Spectroscopy) apparatus.

図３は、本実施形態の実装基板１０の一例の断面を示す図である。図３（ａ）は、ビア導体１４の断面の走査型電子顕微鏡写真であり、（ｂ）〜（ｄ）は（ａ）断面についてのＥＰＭＡ分析画像である。ＥＰＭＡ分析装置として、ＥＰＭＡ波長分散型装置：ＪＸＡ−８６００Ｍを用い、分析サンプリングタイム０．５ｓｅｃで撮影した。（ｂ）〜（ｃ）の各画像の濃度の淡い部分が、（ｂ）は銅（Ｃｕ）元素、（ｃ）はタングステン（Ｗ）元素、（ｄ）はケイ素（Ｓｉ）元素、のそれぞれの含有量の濃度の濃い部分に対応している。図３（ｂ）〜（ｄ）については、白色に近いほど、対応する各元素の含有割合が比較的高い。図３における上下方向は、図２における上下方向に対応しており、発光素子２０は、図３の上方に実装されている。   FIG. 3 is a view showing a cross section of an example of the mounting substrate 10 of the present embodiment. FIG. 3A is a scanning electron micrograph of a cross section of the via conductor 14, and FIGS. 3B to 3D are EPMA analysis images of the cross section (a). An EPMA wavelength dispersion type apparatus: JXA-8600M was used as an EPMA analyzer, and an image was taken at an analysis sampling time of 0.5 sec. (B)-(c) The light-density part of each image, (b) is a copper (Cu) element, (c) is a tungsten (W) element, (d) is a silicon (Si) element, respectively. Corresponds to the dark portion of the content. About FIG.3 (b)-(d), the content rate of each corresponding element is comparatively high, so that it is near white. The up-down direction in FIG. 3 corresponds to the up-down direction in FIG. 2, and the light emitting element 20 is mounted on the upper side in FIG.

図３（ａ）で比較的白っぽく見える領域と、図３（ｃ）で比較的白く見える領域とで、対応している部分が確認できる。図３（ａ）に白っぽく見える領域は、タングステン（Ｗ）を多く含んでいる領域も多く含んでいる。なお、図３では示していないが、図３（ｃ）で白っぽく現れている領域には、酸素（Ｏ）も比較的多く含有されていることを確認している。特に図３（ｃ）から、銅（Ｃｕ）を主成分とするビア導体１４内に、酸化タングステン（ＷＯ３）を主成分とする第２成分１８が分散していることがわかる。また、図３（ｃ）と図３（ｄ）とを比較すると、図３（ｃ）で比較的白っぽく見える領域と、図３（ｄ）で比較的白っぽく見える領域とで対応している部分がある（例えば図３（ｄ）にてＡで示す部分など）。ビア導体１４内に、酸化タングステン（ＷＯ３）からなる第２成分１８と、ケイ素（Ｓｉ）と酸素（Ｏ）とを含有する低熱膨張領域も分散している。Corresponding portions can be confirmed between the region that appears relatively whitish in FIG. 3A and the region that appears relatively white in FIG. The region that appears whitish in FIG. 3A includes many regions that contain a lot of tungsten (W). Although not shown in FIG. 3, it is confirmed that oxygen (O) is contained in a relatively white area in FIG. 3C. In particular, FIG. 3C shows that the second component 18 mainly composed of tungsten oxide (WO 3 ) is dispersed in the via conductor 14 mainly composed of copper (Cu). Further, comparing FIG. 3C and FIG. 3D, there is a portion corresponding to the region that appears relatively whitish in FIG. 3C and the region that appears relatively whitish in FIG. (For example, a portion indicated by A in FIG. 3D). A low thermal expansion region containing a second component 18 made of tungsten oxide (WO 3 ) and silicon (Si) and oxygen (O) is also dispersed in the via conductor 14.

図３（ｃ）に表れているように、第２成分１８の体積占有率は、図３中の上側である一方主面１０Ａの側が、より高くなっている。具体的に、ビア導体１４を、一方主面１０Ａに略平行な仮想面で長さ方向に２等分した際に、この仮想面から一方主面１０Ａまでの領域における第２成分１８の体積占有率が、この仮想面から他方主面１０Ｂまでの領域における第２成分１８の体積占有率に比べて、２倍以上大きくなっている。   As shown in FIG. 3C, the volume occupancy ratio of the second component 18 is higher on the one main surface 10A side, which is the upper side in FIG. Specifically, when the via conductor 14 is bisected in the longitudinal direction by a virtual plane substantially parallel to the one main surface 10A, the volume occupation of the second component 18 in the region from the virtual surface to the one main surface 10A The rate is at least twice as large as the volume occupancy of the second component 18 in the region from the virtual surface to the other main surface 10B.

このように、ビア導体１４は電気抵抗が比較的小さい銅（Ｃｕ）を主成分としており、発光素子２０に供給される電気エネルギーの損失が比較的小さい。また、発光素子２０は、発光に伴い比較的大きな熱を発する。   As described above, the via conductor 14 is mainly composed of copper (Cu) having a relatively small electric resistance, and the loss of electric energy supplied to the light emitting element 20 is relatively small. In addition, the light emitting element 20 emits relatively large heat with light emission.

発光装置１では、発光素子２０の発熱に伴い、ビア導体１４および基板１２が熱膨張する。セラミックスを主成分とする基板１２に対し、銅（Ｃｕ）等の金属を主成分とするビア導体１４の熱膨張は大きい。このため、発光素子２０の発光の度に、発光に伴う熱膨張のずれに起因した熱応力が、ビア導体１４および基板１２に発生する。この熱応力は、仮にビア導体１４を銅（Ｃｕ）などの金属のみで構成した場合に特に大きく、発光素子２０の発光の繰り返しによって、ビア導体１４と基板１２の貫通孔１２ａの内壁との剥離が生じる場合があった。   In the light emitting device 1, the via conductor 14 and the substrate 12 thermally expand as the light emitting element 20 generates heat. The thermal expansion of the via conductor 14 whose main component is a metal such as copper (Cu) is larger than that of the substrate 12 whose main component is ceramic. For this reason, every time the light emitting element 20 emits light, a thermal stress due to a shift in thermal expansion accompanying light emission is generated in the via conductor 14 and the substrate 12. This thermal stress is particularly large when the via conductor 14 is made of only a metal such as copper (Cu), and the via conductor 14 and the inner wall of the through hole 12a of the substrate 12 are peeled off by repeated light emission of the light emitting element 20. May occur.

本実施形態では、第１成分である銅（Ｃｕ）よりも熱膨張係数が低い金属酸化物である酸化タングステン（ＷＯ３）からなる第２成分１８が、ビア導体１４の内部に分散している。発光装置１では、内部に分散している、熱膨張係数が相対的に低い第２成分１８が緩衝部となり、ビア導体１４全体の熱膨張の程度が抑制される。このため、ビア導体１４と基板１２にかかる熱応力、特にビア導体１４と基板１２の貫通孔１２ａの内壁との境界部分にかかる熱応力が緩和され、発光素子２０を繰り返し発光させた場合であっても、ビア導体１４と基板１２との接合を、比較的強固な状態で長期間持続させることができる。In the present embodiment, the second component 18 made of tungsten oxide (WO 3 ), which is a metal oxide having a lower thermal expansion coefficient than copper (Cu), which is the first component, is dispersed inside the via conductor 14. . In the light emitting device 1, the second component 18 dispersed inside and having a relatively low thermal expansion coefficient serves as a buffer portion, and the degree of thermal expansion of the via conductor 14 as a whole is suppressed. Therefore, the thermal stress applied to the via conductor 14 and the substrate 12, particularly the thermal stress applied to the boundary portion between the via conductor 14 and the inner wall of the through hole 12 a of the substrate 12 is alleviated, and the light emitting element 20 is caused to emit light repeatedly. However, the bonding between the via conductor 14 and the substrate 12 can be maintained for a long time in a relatively strong state.

また本実施形態では、このビア導体１４における第２成分１８の体積占有率が、発光素子２０が実装される側の一方主面１０Ａの側で、より大きくなっており、ビア導体１４のうち、より温度が高い側で、熱膨張の緩和の程度がより大きくされており、ビア導体１４内部での熱応力分布も比較的少なく、応力の局所的な集中も抑制されている。   In the present embodiment, the volume occupancy of the second component 18 in the via conductor 14 is larger on the side of the one main surface 10A on the side where the light emitting element 20 is mounted. On the higher temperature side, the degree of relaxation of thermal expansion is increased, the thermal stress distribution inside the via conductor 14 is relatively small, and local concentration of stress is also suppressed.

また、貫通孔１２ａの孔径は、発光素子２０が配置される側の一方主面１０Ａに近づくにつれて大きくなっている。発光素子２０において発生した熱は、比較的大径のビア導体１４に伝わって、発光素子２０自体は比較的高い効率で冷却される。また、発光素子２０により近い部分で第２成分１８の体積占有率が大きく、ビア導体１４と貫通孔１２ａとの剥離は抑制されている。   Moreover, the hole diameter of the through-hole 12a becomes large as it approaches 10A of one main surfaces by the side where the light emitting element 20 is arrange | positioned. The heat generated in the light emitting element 20 is transmitted to the via conductor 14 having a relatively large diameter, and the light emitting element 20 itself is cooled with relatively high efficiency. Further, the volume occupancy of the second component 18 is large in a portion closer to the light emitting element 20, and the peeling between the via conductor 14 and the through hole 12a is suppressed.

また、ビア導体１４には、第２成分１８とガラス（ＳｉＯ２）成分とからなる低膨張領域が分散している。ガラス（ＳｉＯ２）成分は、例えば後述する焼成工程など、ビア導体１４を形成する工程において、ビア導体１４と基板１２の貫通孔１２ａの内壁との界面などに、局所的に偏析し易い。本実施形態では、低膨張領域において、第２成分１８とガラス成分（ＳｉＯ２）とが付着した状態で、ビア導体１４内に分散している。このため、ビア導体１４と貫通孔１２ａの内壁との境界部分に、ガラス（ＳｉＯ２）成分の偏析等が比較的少なく、熱膨張に起因したビア導体１４の剥離が、より確実に抑制されている。また、このガラス成分（ＳｉＯ２）は、第２成分１８と同様、熱膨張の程度の違いを緩和する効果を奏する。Further, in the via conductor 14, a low expansion region composed of the second component 18 and a glass (SiO 2 ) component is dispersed. The glass (SiO 2 ) component is likely to be segregated locally at the interface between the via conductor 14 and the inner wall of the through hole 12a of the substrate 12 in a process of forming the via conductor 14 such as a baking process described later. In the present embodiment, the second component 18 and the glass component (SiO 2 ) are dispersed in the via conductor 14 in the low expansion region. For this reason, there is relatively little segregation of the glass (SiO 2 ) component at the boundary portion between the via conductor 14 and the inner wall of the through hole 12a, and peeling of the via conductor 14 due to thermal expansion is more reliably suppressed. Yes. In addition, this glass component (SiO 2 ) has an effect of mitigating the difference in the degree of thermal expansion, like the second component 18.

発光装置１は、複数の発光素子２０が一方主面１０Ａの側に高密度に配置されており、コンパクトでありながら比較的大光量で発光することができる一方、大量の熱を発生する。実装基板１０は、かかる発光装置１に好適である。なお、本発明の実装基板１０は、発光装置１に限らず、比較的大きな熱量を発する、パワーモジュール用半導体素子の実装等にも、好適に用いることができる。   The light-emitting device 1 has a plurality of light-emitting elements 20 arranged at a high density on the one main surface 10A side, and can emit light with a relatively large amount of light while being compact, while generating a large amount of heat. The mounting substrate 10 is suitable for the light emitting device 1. The mounting substrate 10 of the present invention is not limited to the light emitting device 1 and can be suitably used for mounting power module semiconductor elements that generate a relatively large amount of heat.

また、図４は、本発明の実装基板の他の実施形態である実装基板６０を備えて構成される発光装置５０について説明する図であり、（ａ）は発光装置５０の概略斜視図、（ｂ）は発光装置５０の概略断面図である。また、図５は、図４（ｂ）の一部を拡大して示す図である。   FIG. 4 is a diagram for explaining a light emitting device 50 configured to include a mounting substrate 60 which is another embodiment of the mounting substrate of the present invention. FIG. 4A is a schematic perspective view of the light emitting device 50. FIG. b) is a schematic cross-sectional view of the light emitting device 50. FIG. 5 is an enlarged view of a part of FIG.

実装基板６０は、セラミックスを主成分とする、貫通孔５１ａを備えた絶縁性基板５１（以下、基板５１とする）と、貫通孔内５１ａ内に配置されたビア導体６４と、一方主面６０Ａに形成されたパターン導体６６Ａと、他方主面６０Ｂに形成されたパターン導体６６Ｂと、を備えて構成されている。   The mounting substrate 60 includes an insulating substrate 51 (hereinafter, referred to as a substrate 51) having a through hole 51a mainly composed of ceramics, a via conductor 64 disposed in the through hole 51a, and one main surface 60A. The pattern conductor 66A is formed on the other main surface 60B, and the pattern conductor 66B is formed on the other main surface 60B.

発光装置５０は、実装基板６０の一方主面６０Ａ側と他方主面６０Ｂ側に、それぞれパターン導体６６Ａとパターン導体６６Ｂとが設けられている点で、先の実施形態の実装基板１０と異なっている。発光装置５０でも、実装基板６０の一方主面６０Ａ側に、例えば公知のＬＥＤ素子である複数の発光素子７０が配置されている。発光素子７０は、一方の主面に第１電極７２を備えるとともに、他方主面に第２電極７４を備えている。   The light emitting device 50 is different from the mounting substrate 10 of the previous embodiment in that the pattern conductor 66A and the pattern conductor 66B are provided on the one main surface 60A side and the other main surface 60B side of the mounting substrate 60, respectively. Yes. Also in the light emitting device 50, a plurality of light emitting elements 70, which are known LED elements, are disposed on the one main surface 60 </ b> A side of the mounting substrate 60. The light emitting element 70 includes a first electrode 72 on one main surface and a second electrode 74 on the other main surface.

この実施形態では、１つのビア導体６４に対して、１つの発光素子７０が電気的に接続されている。ビア導体６４の、他方主面６０Ｂの側の端面には所定のパターン導体６６Ｂが接続し、ビア導体６４の一方主面６０Ａの側は、接合層６３を介して発光素子２０の第２電極７４と接続されている。また、実装基板６０の一方主面６０Ａの側には、パターン導体６６Ａが設けられている。パターン導体６６Ａは、実装部９１と配線部９２とを有し、実装部９１に発光素子７０が実装されているとともに、配線部９２と発光素子７０の第１電極７２とが、ボンディングワイヤ７５を介して接続されている。この実施形態でも、ビア導体６４内に酸化タングステン（ＷＯ３）からなる第２成分６８が分散されており、第２成分６８の体積占有率が、一方主面６０Ａの側でより高くなっている。また、第２成分６８とガラス（ＳｉＯ２）成分とからなる低熱膨張領域も、ビア導体６４の内部に分散している。
この発光装置５０でも、発光素子７０における発熱は、ビア導体６４を介して効率的に排熱される。また、ビア導体６４内には、低熱膨張領域が分散しており、熱応力に伴って発生する絶縁基板５０とビア導体６４との接合不良は比較的少ない。このように、実装する素子７０の構造に応じて、ビア導体６４の配置や、素子７０の接続構造を変更することで、様々な素子を実装することができる。In this embodiment, one light emitting element 70 is electrically connected to one via conductor 64. A predetermined pattern conductor 66B is connected to the end surface of the via conductor 64 on the other main surface 60B side, and the one main surface 60A side of the via conductor 64 is connected to the second electrode 74 of the light emitting element 20 via the bonding layer 63. Connected with. A pattern conductor 66 </ b> A is provided on the one main surface 60 </ b> A side of the mounting substrate 60. The pattern conductor 66 </ b> A has a mounting portion 91 and a wiring portion 92. The light emitting element 70 is mounted on the mounting portion 91, and the wiring portion 92 and the first electrode 72 of the light emitting element 70 connect the bonding wire 75. Connected through. Also in this embodiment, the second component 68 made of tungsten oxide (WO 3 ) is dispersed in the via conductor 64, and the volume occupancy of the second component 68 is higher on the one main surface 60A side. . The low thermal expansion region composed of the second component 68 and the glass (SiO 2 ) component is also dispersed inside the via conductor 64.
Also in the light emitting device 50, the heat generated in the light emitting element 70 is efficiently exhausted through the via conductor 64. In addition, the low thermal expansion regions are dispersed in the via conductor 64, and there are relatively few joint failures between the insulating substrate 50 and the via conductor 64 that are generated due to thermal stress. As described above, various elements can be mounted by changing the arrangement of the via conductors 64 and the connection structure of the elements 70 according to the structure of the elements 70 to be mounted.

次に、上述の実装基板６０を例に、実装基板の製造方法の一例について説明する。図６（ａ）〜（ｅ）および図７（ａ）〜（ｂ）は、実装基板６０を製造する手順の一部を示す断面工程図である。   Next, an example of a mounting substrate manufacturing method will be described using the mounting substrate 60 described above as an example. FIGS. 6A to 6E and FIGS. 7A to 7B are cross-sectional process diagrams illustrating a part of the procedure for manufacturing the mounting substrate 60.

まず、図６（ａ）に示す、セラミックスを主成分とする絶縁性基板５１（以降、基板５１とする）を準備する。最初に、アルミナ粉末と、焼結助剤粉末とを混合し、水を添加して湿式粉砕する。粉砕後、有機結合材としてポリビニルアルコールなどを添加、混合することによりスラリーを作製する。スラリーを噴霧乾燥し、顆粒を作製する。金型を用いて顆粒を加圧成形し、生成形体をする。生成形体を１５００〜１７００℃で焼成して、アルミナを主成分とする基板５１を作製する。その後、必要に応じて、バリを除去するために基板表面をバレル研磨し、さらに洗浄、乾燥しても良い。   First, an insulating substrate 51 (hereinafter referred to as a substrate 51) having ceramic as a main component as shown in FIG. First, alumina powder and sintering aid powder are mixed, water is added, and wet pulverization is performed. After grinding, a slurry is prepared by adding and mixing polyvinyl alcohol or the like as an organic binder. The slurry is spray dried to produce granules. The granules are pressure-molded using a mold to form a formed body. The generated shaped body is fired at 1500 to 1700 ° C. to produce a substrate 51 mainly composed of alumina. Thereafter, if necessary, the substrate surface may be barrel-polished in order to remove burrs, and further washed and dried.

図６（ｂ）に示すように、基板５１のビア導体６４を設ける位置に、貫通孔５１ａ（スルーホール）を穿設する。貫通孔５１ａの形成方法としては、例えば、マイクロドリルを用いる方法、メカニカルパンチを用いる方法、レーザーアブレーションによる方法等が挙げられる。例えば、複数の発光素子７０を、なるべく高密度に配置したい場合は、貫通孔５１ａの内径は、なるべく小さいことが好ましい。このように貫通孔５１ａのアスペクト比（すなわち、孔径に対する孔深さの比）を大きくするには、レーザーアブレーションによる方法を用いることが好ましい。本実施形態では、例えば発光素子７０が搭載される一方主面６０Ａ側の開口径が約１００μｍの貫通孔５１ａが、複数個穿孔される。レーザアブレーションによる穿孔によって、比較的アスペクト比が高く、かつ一方主面に近づくにしたがって内径がより大きくなった形状の貫通孔５１ａを形成することができる。   As shown in FIG. 6B, a through hole 51a (through hole) is formed at a position where the via conductor 64 of the substrate 51 is provided. Examples of the method for forming the through hole 51a include a method using a micro drill, a method using a mechanical punch, and a method using laser ablation. For example, when it is desired to arrange the plurality of light emitting elements 70 as densely as possible, the inner diameter of the through hole 51a is preferably as small as possible. Thus, in order to increase the aspect ratio of the through hole 51a (that is, the ratio of the hole depth to the hole diameter), it is preferable to use a method by laser ablation. In the present embodiment, for example, a plurality of through holes 51a having an opening diameter of about 100 μm on the one main surface 60A side on which the light emitting element 70 is mounted are drilled. By the drilling by laser ablation, it is possible to form the through-hole 51a having a relatively high aspect ratio and a shape in which the inner diameter becomes larger toward the one main surface.

次に、図６（ｃ）に示すように、基板５１の、発光素子７０が実装される一方主面６０Ａの側に、ビア導体６４および接合層６３の一部を形成するための導電性ペースト５２を塗布する。導電性ペースト５２は、第１成分（本実施形態ではＣｕ）を主成分とする粉末と、第２成分（本実施形態ではＷＯ３）を主成分とする粉末とを含み、これら粉末を、有機バインダと混合して調製することができる。さらに、基板５１とビア導体６４との密着性を向上させる観点から、補助剤としてガラスフリットがペーストに添加されている。有機バインダの種類としては、特に限定されず、例えば、エチルセルロース系、ポリビニルブチラール系、アクリニトリル系等が挙げられる。Next, as shown in FIG. 6C, a conductive paste for forming a part of the via conductor 64 and the bonding layer 63 on the one main surface 60A side of the substrate 51 on which the light emitting element 70 is mounted. 52 is applied. The conductive paste 52 includes a powder mainly composed of a first component (Cu in this embodiment) and a powder mainly composed of a second component (WO 3 in this embodiment). It can be prepared by mixing with a binder. Furthermore, from the viewpoint of improving the adhesion between the substrate 51 and the via conductor 64, glass frit is added to the paste as an auxiliary agent. The type of the organic binder is not particularly limited, and examples thereof include ethyl cellulose, polyvinyl butyral, and acrylonitrile.

ここで、導体粉末に含まれる第１成分および第２成分、各粉末の形状は、特に制限されず、球状、角状、扁平状等が挙げられる。また、これら球状、各状、扁平状の粉末が混合されているものを用いることが好ましい。   Here, the first component and the second component contained in the conductor powder, and the shape of each powder are not particularly limited, and examples thereof include a spherical shape, a square shape, and a flat shape. In addition, it is preferable to use a mixture of these spherical, individual, and flat powders.

より具体的には、例えば、Ｃｕを主成分とする粉末を約７５質量％、ＷＯ３を主成分とする略球状の粉末を約１５質量％、ガラス粉末を約１０質量％、バインダとしてブチルカルビトールを含むペーストを用いることができる。Ｃｕ粉末としては、直径が約１〜５μｍの略球状の粒子からなる粉末と、最長径の平均が約１〜５μｍであるフレーク状の粒子からなる粉末との混合物を用いることができる。これら形状の異なる粒子からなる粉末を用いることで、貫通孔５１ａの内部に、高密度に粉末を充填することができる。More specifically, for example, about 75% by mass of a powder containing Cu as a main component, about 15% by mass of a substantially spherical powder containing WO 3 as a main component, about 10% by mass of glass powder, and butyl carbyl as a binder. A paste containing Toll can be used. As the Cu powder, a mixture of a powder made of substantially spherical particles having a diameter of about 1 to 5 μm and a powder made of flaky particles having an average longest diameter of about 1 to 5 μm can be used. By using powders composed of particles having different shapes, it is possible to fill the through holes 51a with a high density of powder.

次に、図６（ｄ）に示すように、貫通孔５１ａの内部に、ビア導体６４を形成するための導電性ペーストを充填する。この導電性ペーストを焼結構造体のビアホール内に充填する方法は、その充填を十分に行うことができる方法であれば、特に限定されず、加圧印刷、手刷り印刷、真空吸引、スキージで押し込む等の手法を例示できる。比較的開口径の小さい貫通孔５１ａに導電性ペーストを十分に充填するには、例えば図６（ｄ）に図示するような、ロール８０によって導電性ペースト５２の層を加圧して貫通孔５１ａに導電性ペースト５２を充填するロール加圧による充填方法を用いることが好ましい。   Next, as shown in FIG. 6D, a conductive paste for forming the via conductor 64 is filled in the through hole 51a. The method of filling the conductive paste into the via hole of the sintered structure is not particularly limited as long as the filling can be sufficiently performed, and is performed by pressure printing, hand printing, vacuum suction, squeegee. A technique such as pushing in can be exemplified. In order to sufficiently fill the through-hole 51a having a relatively small opening diameter with the conductive paste, for example, as shown in FIG. 6D, the layer of the conductive paste 52 is pressurized with a roll 80 to form the through-hole 51a. It is preferable to use a filling method by roll pressurization for filling the conductive paste 52.

次に、絶縁性基板５１の他方主面６０Ｂの側にも、同様に、パターン導体６６Ｂの一部を形成するための導電性ペースト５２を塗布し、図６（ｅ）に示すように、基板５１の他方主面６０Ｂの側にも導体層を形成する。   Next, similarly, the conductive paste 52 for forming a part of the pattern conductor 66B is also applied to the other main surface 60B side of the insulating substrate 51, and as shown in FIG. A conductor layer is also formed on the other main surface 60B side of 51.

次に、導電性ペースト５２が貫通孔５１ａに充填された状態の焼結構造体を、真空中で例えば１０４０℃程度に加熱し、貫通孔５１ａ内および基板５１の主面（一方主面６０Ａおよび他方主面６０Ｂ）のペースト５２を焼結させる。貫通孔５１ａ内の導電性ペースト５２が焼結することで、ビア導体１４が形成される。この焼成の際、発光素子７０が搭載される側の一方主面６０Ａの側が鉛直下向きになるよう、構造体を配置しておく。   Next, the sintered structure in which the through-hole 51a is filled with the conductive paste 52 is heated to, for example, about 1040 ° C. in a vacuum, and the inside of the through-hole 51a and the main surface (one main surface 60A and the main surface of the substrate 51). The paste 52 on the other main surface 60B) is sintered. Via conductor 14 is formed by sintering conductive paste 52 in through hole 51a. At the time of firing, the structure is arranged so that the one main surface 60A side on which the light emitting element 70 is mounted is vertically downward.

第１成分である銅（Ｃｕ）の融点は１０８０℃、第２成分である酸化タングステン（ＷＯ３）の融点は１４７５℃であり、１０４０℃での焼成過程では、第１成分である銅（Ｃｕ）の溶融の程度に比べ、第２成分である酸化タングステン（ＷＯ３）の溶融の程度は低い。すなわち、この焼成過程では、溶融した第１成分内に、溶融されていない第２成分の粒子が分散した状態となる。また、銅（Ｃｕ）に比べて酸化タングステン（ＷＯ３）の比重は高く、酸化タングステン（ＷＯ３）は鉛直下向きに沈降してくる。発光素子７０が搭載される側の一方主面６０Ａの側が鉛直下向きになるよう、構造体を配置しておくことで、ビア導体６４内における第２成分の６８の分散密度および体積占有率が、一方主面６０Ａの側でより高くなる。また、ビア導体６４の焼成後の温度降下による収縮で、ビア導体６４の端面は、凹状に変形し易い。本実施形態では、発光素子７０が搭載される側に、比較的熱膨張係数の小さい酸化タングステン（ＷＯ３）が高密度に分散しており、発光素子７０が接合される側の端面で、焼成後の冷却に伴う凹状の変形が抑制されている。これにより、発光素子７０とビア導体６４との接合部における空洞の発生等の接合不良も抑制される。The melting point of copper (Cu) as the first component is 1080 ° C., and the melting point of tungsten oxide (WO 3 ) as the second component is 1475 ° C. In the firing process at 1040 ° C., copper (Cu ) Of the second component, tungsten oxide (WO 3 ), is less melted. That is, in this firing process, the unmelted second component particles are dispersed in the melted first component. In addition, the specific gravity of tungsten oxide (WO 3 ) is higher than that of copper (Cu), and tungsten oxide (WO 3 ) settles vertically downward. By disposing the structure so that the one main surface 60A side on which the light emitting element 70 is mounted is vertically downward, the dispersion density and volume occupation ratio of the second component 68 in the via conductor 64 are as follows. On the other hand, it becomes higher on the main surface 60A side. Further, the end surface of the via conductor 64 is easily deformed into a concave shape due to shrinkage due to a temperature drop after firing of the via conductor 64. In the present embodiment, tungsten oxide (WO 3 ) having a relatively small thermal expansion coefficient is dispersed at a high density on the side where the light emitting element 70 is mounted, and firing is performed on the end face on the side where the light emitting element 70 is bonded. The concave deformation accompanying the subsequent cooling is suppressed. As a result, bonding failure such as generation of a cavity at the bonding portion between the light emitting element 70 and the via conductor 64 is also suppressed.

また、酸化タングステン（ＷＯ３）は銅（Ｃｕ）に比べ、ガラス成分との濡れ性が高い。このガラス成分は、ビア導体６４と基板５１の貫通孔５１ａの内壁面との接合に寄与するが、接合に寄与しなかった余分なガラス成分は焼成時に拡散し、酸化タングステン（ＷＯ３）を含む低膨張領域に取り込まれる。これにより、ビア導体６４と貫通孔５１ａの内壁面との接合領域に、余分なガラス成分が偏析することが抑制される。In addition, tungsten oxide (WO 3 ) has higher wettability with a glass component than copper (Cu). This glass component contributes to the bonding between the via conductor 64 and the inner wall surface of the through-hole 51a of the substrate 51, but the excess glass component that did not contribute to the bonding diffuses during firing and contains tungsten oxide (WO 3 ). Captured in the low expansion region. Thereby, it is suppressed that an excess glass component is segregated in the joining region between the via conductor 64 and the inner wall surface of the through hole 51a.

次に、基板５１の一方主面６０Ａおよび一方主面６０Ｂの側の各導体層について、例えば公知のフォトリソグラフィー法を用いたエッチング処理を行い、図７（ａ）に示すような所望のパターン導体６６Ａおよびパターン導体６６Ｂを形成する。エッチング手法としては、ウエットエッチング法やドライエッチング法など、公知のエッチング手法を用いればよい。例えば、レジスト等からなるエッチングマスクを選択的に塗布した後、エッチング剤（エッチャント）である塩化第２鉄溶液に全体を浸漬し、レジスト形状に応じたパターン導体６６Ａ、６６Ｂを形成する。   Next, for each conductor layer on the one main surface 60A side and the one main surface 60B side of the substrate 51, for example, an etching process using a known photolithography method is performed to obtain a desired pattern conductor as shown in FIG. 66A and pattern conductor 66B are formed. As an etching method, a known etching method such as a wet etching method or a dry etching method may be used. For example, after selectively applying an etching mask made of resist or the like, the whole is immersed in a ferric chloride solution as an etchant (etchant) to form pattern conductors 66A and 66B according to the resist shape.

次に、このパターン導体６６Ａの実装部９１に、Ｎｉメッキ層とＡｕ層とを順次積層したＡｕ／Ｎｉメッキ層（図７において図示せず）を形成した後、半田層（図７において図示せず）を介して発光素子７０を接合する。その後、図７（ｂ）に示すように、ボンディングワイヤ７５によって発光素子７０の第１電極７２と、パターン導体６６Ａの配線部９２とを接続する。発光装置５０は、例えばこのような工程で作製することができる。   Next, an Au / Ni plating layer (not shown in FIG. 7) in which a Ni plating layer and an Au layer are sequentially laminated is formed on the mounting portion 91 of the pattern conductor 66A, and then a solder layer (not shown in FIG. 7). The light emitting element 70 is bonded via Thereafter, as shown in FIG. 7B, the first electrode 72 of the light emitting element 70 and the wiring portion 92 of the pattern conductor 66A are connected by the bonding wire 75. The light emitting device 50 can be manufactured by such a process, for example.

上述したとおり、本発明は、上記実施形態に限定されるものではない。例えば、上記実施形態では、本願発明のデバイスの一例として、実装基板に発光素子が実装された発光装置について説明したが、本願発明のデバイスは、発光素子の他に、受光素子や光電変換素子等が実装基板に実装されていてもよい。また、本発明の実装基板は、パワーモジュール用半導体素子の実装等にも、好適に用いることができる。実装基板を構成する絶縁性基板の材料として、アルミナは、発光素子が発した光を良好に反射する点で好ましいが、パワーモジュール用半導体など、より高い放熱性が求められる実装基板の場合、絶縁性基板として例えば窒化珪素（ＳｉＮ）等を用いることも好ましい。   As described above, the present invention is not limited to the above embodiment. For example, in the above embodiment, the light emitting device in which the light emitting element is mounted on the mounting substrate is described as an example of the device of the present invention. However, the device of the present invention includes a light receiving element, a photoelectric conversion element, and the like in addition to the light emitting element. May be mounted on the mounting substrate. Moreover, the mounting substrate of the present invention can also be suitably used for mounting power module semiconductor elements. As the material for the insulating substrate constituting the mounting substrate, alumina is preferable in that it reflects the light emitted from the light emitting element well, but in the case of a mounting substrate that requires higher heat dissipation, such as a semiconductor for power modules, it is insulated. It is also preferable to use, for example, silicon nitride (SiN) as the conductive substrate.

本発明は、その要旨を逸脱しない範囲内において適宜変更を加えることが可能である。   The present invention can be modified as appropriate without departing from the scope of the invention.

１、５０ 発光装置
１０、６０ 実装基板
１０Ａ、６０Ａ 一方主面
１０Ｂ、６０Ｂ 他方主面
１２、５１ 絶縁性基板
１２ａ、５１ａ 貫通孔
１４、６４ ビア導体
１８、６８ 第２成分
２０、７０ 発光素子DESCRIPTION OF SYMBOLS 1, 50 Light-emitting device 10, 60 Mounting board | substrate 10A, 60A One main surface 10B, 60B The other main surface 12, 51 Insulating board | substrate 12a, 51a Through-hole 14, 64 Via conductor 18, 68 Second component 20, 70 Light-emitting element

Claims (10)

セラミックスを主成分とする、貫通孔を備えた絶縁性基板と、
前記貫通孔内に配置されたビア導体と、を備えて構成された実装基板であって、
前記ビア導体は、金属からなる第１成分と、前記ビア導体の内部に分散した、前記第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分とを含むことを特徴とする実装基板。An insulating substrate having a through-hole mainly composed of ceramics;
A via substrate disposed in the through hole, and a mounting board configured to include:
The via conductor includes a first component made of metal and a second component made of a metal oxide having a lower coefficient of thermal expansion than the first component dispersed inside the via conductor. substrate. 前記第２成分が酸化タングステン（ＷＯ３）であることを特徴とする請求項１記載の実装基板。The mounting substrate according to claim 1, wherein the second component is tungsten oxide (WO 3 ). 前記第１成分が銅（Ｃｕ）であることを特徴とする請求項１または２記載の実装基板。   The mounting substrate according to claim 1, wherein the first component is copper (Cu). 前記ビア導体は、前記第２成分とケイ素（Ｓｉ）と酸素（Ｏ）とを含有する、前記第１成分よりも熱膨張係数が低い低熱膨張領域を有することを特徴とする請求項１〜３のいずれかに記載の実装基板。   The said via conductor has a low thermal expansion area | region where the thermal expansion coefficient is lower than the said 1st component containing the said 2nd component, silicon (Si), and oxygen (O). The mounting board | substrate in any one of. 前記貫通孔は、前記絶縁性基板の２つの主面のうち一方主面に近づくに従い内径がより大きく、
前記一方主面の側で、前記ビア導体における前記第２成分の体積占有率がより大きいことを特徴とする請求項１〜４のいずれかに記載の実装基板。The through hole has a larger inner diameter as it approaches one of the two main surfaces of the insulating substrate,
5. The mounting board according to claim 1, wherein the volume ratio of the second component in the via conductor is larger on the side of the one main surface. 請求項１〜５のいずれかに記載の実装基板と、前記実装基板に実装されて前記ビア導体に電気的に接続された機能素子とを含むデバイスであって、
前記機能素子は、前記絶縁性基板の前記一方主面に実装されていることを特徴とするデバイス。A device comprising the mounting substrate according to any one of claims 1 to 5 and a functional element mounted on the mounting substrate and electrically connected to the via conductor,
The device, wherein the functional element is mounted on the one main surface of the insulating substrate. 前記機能素子は、供給される電力に応じて光を発するＬＥＤ素子であることを特徴とする請求項６記載のデバイス。   The device according to claim 6, wherein the functional element is an LED element that emits light according to supplied electric power. セラミックスを主成分とする、貫通孔が設けられた絶縁性基板を準備し、
前記絶縁性基板の前記貫通孔に、前記セラミックスよりも融点が低い金属からなる第１成分を主成分とする粒子と、前記第１成分よりも融点が高く、かつ前記第１成分よりも熱膨張係数が低い金属酸化物からなる第２成分を主成分とする粒子とを含むペーストを充填し、
前記ペーストが前記貫通孔の内部に充填された前記絶縁性基板を熱処理することを特徴とする実装基板の製造方法。Prepare an insulating substrate with ceramics as the main component and provided with through holes,
In the through-hole of the insulating substrate, particles mainly composed of a first component made of a metal having a melting point lower than that of the ceramic, a melting point higher than that of the first component, and thermal expansion of the first component. Filling a paste containing particles mainly composed of a second component made of a metal oxide having a low coefficient,
A method of manufacturing a mounting substrate, comprising: heat-treating the insulating substrate in which the paste is filled in the through hole. 前記第１成分に比べて、前記第２成分の比重が大きいことを特徴とする請求項８記載の実装基板の製造方法。   9. The method for manufacturing a mounting board according to claim 8, wherein the specific gravity of the second component is larger than that of the first component. 前記第１成分が銅（Ｃｕ）であり、前記第２成分が酸化タングステン（ＷＯ３）であることを特徴とする請求項９記載の実装基板の製造方法。The method for manufacturing a mounting substrate according to claim 9, wherein the first component is copper (Cu) and the second component is tungsten oxide (WO 3 ).
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