JPWO2006064742A1 - Self-excited reactive power compensator - Google Patents

Abstract

A self-excited reactive power compensator that achieves both high performance and high efficiency, and is connected to the DC power sources C1, C2, and C3 having a charge / discharge function and the DC power sources C1, C2, and C3, and the DC power sources C1, C2 , And a plurality of power supply circuits 41, 42, and 43 including self-excited inverters I1, I2, and I3 that convert the voltage of C3 into an AC voltage and output the same to the power system. The voltages of the power supplies C1, C2, and C3 are different from each other.

Description

  The present invention relates to a reactive power compensator connected to a power system and supplying reactive power to the power system, and more particularly to a self-excited reactive power compensator using a self-excited inverter.

  2. Description of the Related Art Conventionally, a self-excited reactive power compensator is installed for the purpose of voltage compensation necessary for improving the stability of an electric power system or power factor improvement necessary for reducing power receiving facility capacity.

  In this self-excited reactive power compensator, for example, as shown in Patent Document 1, a single capacitor is used as a DC power source, a DC voltage output from the capacitor is converted into an AC voltage by an inverter, and the AC voltage is converted into a power system. To output.

  However, PWM control is used for inverter control of this self-excited reactive power compensator, and there is a trade-off relationship between performance and loss. In other words, in order to improve the performance of the self-excited reactive power compensator, it is necessary to increase the number of switches in order to increase the number of pulses. There is a problem that it cannot be achieved.

On the other hand, in order to eliminate the power loss due to the semiconductor switch element and achieve high efficiency, it is necessary to reduce the number of switches as much as possible. However, if this is done, the output current cannot be adjusted accurately and the system voltage can be stabilized. Problems such as troubles and outflow of harmonics to the system will occur.
JP-A-8-137564

  Accordingly, the main object of the present invention is to provide a self-excited reactive power compensator that solves the trade-off relationship between the performance and the loss at once and provides both high performance and high efficiency. It is.

  That is, the self-excited reactive power compensator according to the present invention is connected in parallel to the power system and supplies reactive power as an output voltage to the power system, thereby adjusting the voltage of the power system and improving the power factor of the load. A self-excited reactive power compensator for performing a self-excited reactive power compensator, which is connected to the DC power source having a charge / discharge function, converts a DC voltage output from the DC power source into an AC voltage, and outputs the AC voltage to the power system. A plurality of power supply circuits composed of inverters are connected in series, and the voltages of the respective DC power supplies are different from each other.

  If this is the case, a plurality of power supply circuits with different output voltages are connected in series, and the magnitude of the output voltage can be changed by the combination of the power supply circuits. Therefore, a high-performance and high-efficiency self-excited reactive power compensator can be provided.

  As a specific embodiment, it is desirable that the voltage ratio of the DC voltage charged to each of the DC power sources is in a power-of-two relationship.

  A capacitor is conceivable as the DC power source.

  For example, when capacitors are used, the total energy input / output from each capacitor is ideally zero, but in reality, an effective current that compensates for the loss of the inverter and a harmonic current generated by the inverter flow simultaneously. Therefore, it is necessary to control so that the total sum of energy input and output from each capacitor including these becomes zero. In order to satisfy the necessity, a control unit is provided that controls the phase difference between the output voltage and the system voltage to adjust energy input and output between the power system and the respective capacitors. It is desirable.

  In order to achieve higher performance by keeping the voltage of each capacitor constant, when the control unit outputs a desired output voltage, the voltage ratio between the capacitors is set to a predetermined value as much as possible. It is desirable to define the operation for each self-excited inverter so as to approach each other.

  In order to further enhance the effect of the present invention, the control unit calculates the average sum of energy input and output for each capacitor every quarter cycle, every half cycle, or every integer cycle of the AC frequency. Is preferably adjusted to be substantially zero.

  Further, in order to always realize a high-accuracy voltage output of 15 levels regardless of the output voltage, the control unit is based on the withstand voltage performance and current capacity of components such as a semiconductor switch element, a capacitor or a reactor, for example. The self-excited inverter is configured so as to limit the upper and lower limits of the output voltage for outputting the reactive power, and within that range, the sum of the voltages of the respective DC power sources is made as substantially as possible as the output voltage. It is preferable to define each operation.

  In addition, the self-excited reactive power compensator according to the present invention is connected in parallel to the power system and supplies reactive power to the power system, thereby adjusting the voltage of the power system and improving the power factor of the load. A self-excited reactive power compensator that is connected in series to a power supply circuit comprising a capacitor and a self-excited inverter that is connected to the capacitor and converts the voltage of the capacitor into an AC voltage and outputs the AC voltage to the power system. And a control unit that controls the phase difference between the output voltage and the system voltage, and adjusts the total sum of energy input and output between the power system and the respective capacitors. The voltage of the capacitor has a relationship of approximately 4: 2: 1, and the control unit performs the withstand voltage performance and voltage of components such as a semiconductor switch element, a capacitor, or a reactor. Based on the capacity, the upper and lower limits of the output voltage for outputting the reactive power are limited, and in that range, the sum of the capacitor voltages is made as substantially as possible as the output voltage, and The operation of each self-excited inverter is determined so that the voltage ratio maintains a relationship of approximately 4: 2: 1.

  If this is the case, the magnitude of the capacitor voltage can be raised or lowered in accordance with the desired output voltage while maintaining a substantially 4: 2: 1 relationship. Accurate voltage output can be made possible.

  According to the present invention configured as described above, a plurality of power supply circuits having different output voltages are connected in series, and the magnitude of the output voltage can be changed by the combination thereof. Since the number of switches can be reduced, a high-performance and high-efficiency self-excited reactive power compensator can be provided.

1 is a schematic configuration diagram of a self-excited reactive power compensator according to a first embodiment of the present embodiment. The equipment block diagram of the information processing apparatus in the embodiment. The function block diagram of the information processing apparatus in the embodiment. The block diagram which shows the control method of the inverter in the embodiment. The table | surface which shows the combination of the output level of the control method of the inverter in the embodiment, and the capacitor voltage condition at that time. The figure which shows the operation timing of each power supply circuit in the embodiment. The figure which shows charge and discharge of an inverter at the time of outputting the voltage of the output level 1 in the same embodiment. The figure which shows the result of the operation simulation of the self-excited reactive power compensation apparatus using the conventional 3 pulse inverter. The figure which shows the result of the operation simulation of the self-excited reactive power compensation apparatus using the conventional 16 pulse inverter. The figure which shows the condition setting of the operation simulation of the self-excited reactive power compensation apparatus which concerns on the same embodiment. The figure which shows operation | movement of each inverter in the simulation. The figure which shows transition of the capacitor voltage in the simulation. The figure which shows transition of the phase adjustment amount of the output voltage in the simulation. The figure which shows the system current etc. in the simulation. The figure which shows the total value of a capacitor voltage, and the operation timing of each power supply circuit at that time. The block diagram which shows the control method of the inverter of the self-excitation reactive power compensator which concerns on 2nd Embodiment of this invention. The figure which shows the condition setting of the operation simulation of the self-excited reactive power compensation apparatus which concerns on the same embodiment. The figure which shows the result of the operation simulation of the self-excited reactive power compensation apparatus which concerns on the same embodiment.

Explanation of symbols

1 ... self-excited reactive power _{compensator, V} p ... system _{voltage, V SVC} ... output voltage, 41, 42, 43 ... power supply circuit, C1, C2, C3 ... DC power supply (capacitor ), I1, I2, I3... Self-excited inverter, 82.

  <First Embodiment>

  A self-excited reactive power compensator according to a first embodiment of the present invention will be described below with reference to the drawings.

  As shown in FIG. 1, a self-excited reactive power compensator 1 according to this embodiment is connected in parallel to a load (customer) 3 in an electric power system including an AC power supply 2 and a load (customer) 3. By supplying reactive power to the power system, the system voltage of the power system is adjusted and the load power factor is improved.

  The self-excited reactive power compensator 1 includes a power supply circuit 41, 42, 43 and an initial charging circuit 5 for charging initial power to the DC power sources C1, C2, C3 of the power supply circuits 41, 42, 43. Become. Here, the self-excited reactive power compensator 1 is configured by connecting power supply circuits 41, 42, and 43 in series.

  Each part will be described in detail.

  The power supply circuits 41, 42, and 43 are connected to the DC power supplies C1, C2, and C3 having charge / discharge functions and the DC power supplies C1, C2, and C3, and the voltages Vh and Vm output from the DC power supplies C1, C2, and C3. , Vl is converted into an AC voltage and output to the power system by self-excited inverters I1, I2, and I3.

The direct current power sources C1, C2, and C3 are capacitors, and the initial charging voltage Vh ₀ , Vm ₀ , and Vl ₀ are each set to a power of 2 by the initial charging circuit 5 described later, that is, the respective charging voltages. Vh ₀ , Vm ₀ , and Vl ₀ are charged so as to be approximately 2 ⁿ times (n = 0, 1, 2) with respect to the minimum charging voltage Vl ₀ . That is, charging is performed so that Vh ₀ = 2 × Vm ₀ = 2 × 2 × Vl ₀ is satisfied. Specifically, the peak values of the alternating voltage with reference to the initial charging voltages Vh ₀ , Vm ₀ , and Vl ₀ are set to 60 [%], 30 [%], and 15 [%], respectively.

  Self-excited inverters I1, I2, and I3 are full-bridge inverters composed of semiconductor switch elements I11, I21, and I31 and diodes I12, I22, and I32 anti-parallel to them, and are connected to capacitors C1, C2, and C3. The DC voltages Vh, Vm, and Vl of the capacitors C1, C2, and C3 are converted into AC voltages and output to the power system. In the present embodiment, IGBTs (Insulated Gate Bipolar Transistors) are used as the semiconductor switch elements I11, I21, and I31, which have a small saturation voltage when turned on and a small power loss. The self-excited inverters I1, I2, and I3 are controlled to be turned on and off by a drive signal to the gate using a control unit 82 of the information processing apparatus 8 to be described later, so that an operation pattern (switch pattern) is controlled.

The initial charging circuit 5 is for charging DC voltages Vh ₀ , Vm ₀ , Vl ₀ to the capacitors C 1, C 2, C 3, and includes a charging transformer 51, which is parallel to the capacitors C 1, C 2, C 3. Connected to. The charging operation is performed only when the apparatus is activated. When charging is completed, the capacitors C1, C2, and C3 are electrically disconnected by a switch (not shown), and the operation of the self-excited reactive power compensator 1 is not affected at all.

Thus, the present embodiment, the capacitor voltage measuring unit 7 for measuring the phase measuring unit 6 for measuring the phase angle of the system voltage V _p, the capacitor voltage Vh, Vm, and Vl, the peak value of the system voltage V _p The system voltage measuring unit 9 for measuring the output voltage V _SVC and the information processing device 8 for adjusting the peak value and phase of the output voltage V _SVC based on the measurement data therefrom are provided.

Phase measuring unit 6 is for measuring the phase angle of the system voltage V _p, and outputs a phase angle measurement data indicating the measurement result to the information processing apparatus 8.

  The capacitor voltage measurement unit 7 is for measuring voltages Vh, Vm, and Vl charged in the capacitors C1, C2, and C3, and outputs the voltage measurement data to the information processing device 8.

System voltage measuring unit 9 measures the peak value of the system voltage V _p, and outputs the system voltage measurement data indicating the measurement result to the information processing apparatus 8.

  As shown in FIG. 2, the information processing apparatus 8 is a general purpose or dedicated computer having a CPU 801, a memory 802, an input / output interface 803, etc., and a predetermined program stored in a predetermined area of the memory 802. As shown in FIG. 3, the CPU 801, peripheral devices, and the like cooperate with each other so that the functions of the reception unit 81, the control unit 82, and the like are exhibited.

  The receiving unit 81 receives the measurement data from each measurement unit described above and outputs it to the control unit 82.

The control unit 82 controls the phase difference between the output voltage V _SVC and the system voltage V _p based on each measurement data received by the reception unit 81, and the power system and the Adjustment is made so that the average of the total energy input and output between the capacitors C1, C2, and C3 becomes zero. That is, the capacitor voltages Vh, Vm, and Vl are monitored, and active power is transferred to and from the power system according to the difference between the charging energy and the initial charging energy, and the charging energy of the capacitors C1, C2, and C3. in which the sum E _c of is controlled to be a constant value.

Specifically, as shown in the block diagram of FIG. 4, the phase difference φ of the output voltage V _SVC with respect to the system voltage V _p is determined, and the target voltage V _ref of the output voltage V _SVC of the self-excited reactive power compensator 1 is The inverters I1, I2, and I3 are controlled by the following equation.

Here, V _p is the peak value of the AC voltage of the AC power source 2, X _p is the impedance of the power system, X _SVC is the impedance of the reactor 10 of the self-excited reactive power compensator 1, and Q is connected in the same way as general SVC. control of the system point voltage V _t, depending on the purpose, such as power factor correction, is calculated by the information processing apparatus 8.

In the block diagram of FIG. 4, the constant K ₁ is a constant for adjusting the time required to correct the error between the sum E _c and the reference value E _ref , and the constant K ₂ is the temporal vibration of the sum E _c. It is a constant for suppressing The constant K ₃ is used to treat the intermediate variable P as power for correcting the error between the sum E _c and the reference value E _ref , and exchange it between the self-excited reactive decoration compensation device 1 and the power system. It is a constant for converting into the phase difference φ between the system voltage _Vp and the output voltage _VSVC .

Here, the total energy E _c stored in all capacitors and the reference value E _ref are:

Respectively. C1 is the capacitance of the capacitor C1, C2 is the capacitance of the capacitor C2, and C3 is the capacitance of the capacitor C3.

Further, when the control unit 82 outputs the voltage V _SVC , the voltage ratio between the capacitors C1, C2, and C3 is set to a predetermined value (Vh: Vm: Vl = 4: 2: 1) as much as possible. The operation patterns for each of the self-excited inverters I1, I2, and I3 are determined so as to approach each other.

  Specific operation patterns of the self-excited inverters I1, I2, and I3 will be described below.

Since the capacitors C1, C2, and C3 are charged with voltages Vh ₀ , Vm ₀ , and Vl ₀ in a relationship of Vh ₀ = 2 × Vm ₀ = 2 × 2 × Vl _{0 in} the initial charging state, the inverters I1, I2 The voltage V _SVC at seven levels can be output depending on how the operation pattern of I3 is selected. At this time, the minimum output level is set to level 1. Further, there are cases where a plurality of operation patterns of the inverters I1, I2, and I3 can be selected when outputting the voltage V _SVC at the same level.

Operation pattern of the self-excited inverter I1, I2, I3, the capacitor C1, C2, C3 initial charging voltage _Vh 0 _of, Vm 0, Vl ₀ normalized values _{(Vh 0, 2Vm 0, 4Vl} 0) and at the output It compares with the value (Vh, 2Vm, 4Vl) which normalized the charging voltage, and determines so that it may correct | amend preferentially in order of the capacitor | condenser C1, C2, C3 from which the value has deviated.

That is, as shown in the table of FIG. 5, depending on which of the capacitor voltage conditions the states of the voltages Vh, Vm, and V1 of the capacitors C1, C2, and C3 correspond to the output levels, That is, discharging and charging are determined. In the table of FIG. 5, when the value is “1”, the capacitors C1, C2, and C3 are discharged, and when the value is “−1”, the capacitors C1, C2, and C3 are charged. However, when the output current _ISVC and the output voltage are opposite in polarity, the charge / discharge relationship is reversed. In this case, the direction of the inequality sign of the capacitor voltage condition is also reversed. Further, FIG. 6 shows the operation timing of each of the power supply circuits 41, 42, 43 that causes the power supply circuits 41, 42, 43 to perform a predetermined output operation and outputs the output voltage V _SVC and the output current I _SVC of the device 1. ing.

Next, as a specific example, FIG. 7 shows an example in which the voltage V _{SVC of} level 1 is output. As a combination of the capacitor voltages Vh, Vm, and Vl for outputting the level 1 voltage V _SVC ,

  (1) When discharging only the capacitor voltage Vl,

  (2) When discharging the capacitor voltage Vm and charging the capacitor voltage Vl,

  (3) When discharging the capacitor voltage Vh and charging the capacitor voltage Vm and the capacitor voltage Vl,

  There are three ways. This makes it possible to charge and discharge the capacitor voltages Vm and Vl depending on how the output pattern is selected. That is, the capacitor voltages Vh, Vm, and Vl of the power supply circuits 41, 42, and 43 can be adjusted by selecting the operation pattern of the inverters I1, I2, and I3 for each output level.

  Next, the operation of the self-excited reactive power compensator 1 according to this embodiment configured as described above will be described below.

First, when the self-excited reactive power compensator 1 is activated, the system voltage measuring unit 9 measures the peak value of the system voltage V _p , the phase measuring unit 6 measures the phase of the system voltage V _p , and the capacitor voltage measuring unit 7 Measures the capacitor voltages Vh, Vm, and Vl and outputs the measurement data to the information processing device 8, respectively. Then, the information processing apparatus 8 receives the measurement data, and the control unit 82 starts supplying reactive power V _SVC to the power system.

Thereafter, when fluctuations occur in the capacitor voltages Vh, Vm, and Vl, the control unit 82 outputs the output voltage by the control method shown in the control block diagram of FIG. 4 based on the phase measurement data and the capacitor voltage measurement data. Adjust the phase of V _SVC . Thus, the capacitor C1, C2, C3 sum _{E c} of the charging energy is adjusted.

Further, the control unit 82 determines, based on the capacitor voltage measurement data, which of the capacitor voltage conditions in FIG. 5 the capacitor voltages Vh, Vm, Vl apply, and the semiconductor switch elements I11, I21, The operation pattern of I31 is selected and an inverter drive signal is output to the inverter drive circuit 11. Thereby, inverters I1, I2, capacitor voltage Vh with I3 outputs the output voltage _{V SVC} to the desired operation, Vm, the voltage ratio of Vl is Vh: Vm: Vl = 4: 2: Correction 1 relationship Is done.

  Next, the result of the operation simulation of the self-excited reactive power compensator 1 with the specific condition setting shown in FIG. 10 is shown. In this simulation, it is assumed that a voltage drop of 20% has occurred at times 2 [S] to 4 [S] after activation of the apparatus 1. Here, [%] of the voltage of the DC power supply used so far is read as [V]. For comparison, FIG. 8 shows an operation simulation result when only a conventional 3-pulse (carrier frequency 180 Hz) PWM inverter is used, and FIG. 8 shows an operation simulation result when only a 16-pulse (carrier frequency 960 Hz) PWM inverter is used. As shown in FIG.

As shown in FIG. 11, the inverters I1, I2, and I3 are PWM-controlled by the control unit 82, and the output voltage V _SVC is adjusted. At this time, the number of switches of the inverters I1, I2, and I3 is one pulse for the capacitor voltage Vh, three pulses for the capacitor voltage Vm, and seven pulses for the capacitor voltage Vl every half cycle, and the equivalent number of switches is 2.4. Pulse (= (60 [V] × 1 pulse + 30 [V] × 3 pulse + 15 [V] × 7 pulse) / 105 [V]), which can be confirmed to be 3 pulse inverter or less. Furthermore, it can be seen that the harmonic components of the output voltage V _SVC are much smaller than the results of FIGS.

  In FIG. 11, for example, when output level 3 (45 [V]) is output (part A), it can be confirmed that the capacitors C1 and C3 are charged and the capacitor C2 is discharged.

The transition of the phase difference shown in FIG. 12 is stable to about −0.23 [rad] at the time when the system voltage V _p is normal (1-2 [S], 4-5 [S]). Further, it can be seen that the voltage is stable to about -0.5 [rad] during the voltage drop from time 2 [S] to 4 [S].

FIG. 13 shows the result of the satisfactory adjustment function of the capacitor voltages Vh, Vm, and Vl. Despite rapid fluctuation in system voltage _{V p,} the capacitor voltage Vh, Vm, Vl is over the entire time, approximately 60 [V], 30 [V ], it can be seen that stable to 15 [V] .

In addition, although the system voltage V _p is lowered to 80 [V], the interconnection point voltage V _t can be maintained at about 90 [V], and the original self-excited reactive power compensator 1 is achieved. The voltage stabilization effect can also be confirmed.

Further, in the result shown in FIG. 14, the present apparatus 1 supplies the delayed current i _SVC to the power system, and the load power factor (cos ∠ (V _p , i _p )) seen from the system side can be improved satisfactorily. I understand.

  According to the self-excited reactive power compensator 1 configured as described above, a plurality of power supply circuits 41, 42, and 43 having different output voltages Vh, Vm, and Vl are connected in series. Since the number of equivalent switches of the inverters I1, I2, and I3 can be reduced, higher performance and higher efficiency can be realized.

That is, a 15-level inverter with a maximum output voltage of 105 V can be configured in total, and the total distortion of the output voltage V _SVC of this 15-level inverter is about 4% without using a harmonic filter, and a 16-pulse inverter (with a carrier wave of about 1 kHz). It is much higher performance than the inverter). Furthermore, the equivalent number of switches is 2.4 pulses and 3 pulse inverters or less. For example, when a 1 kHz PWM control is performed with a single inverter of 105 [V], that is, compared with a 16 pulse inverter, the switching loss is 15%. It only takes about. As described above, according to the present embodiment, both high performance and high efficiency can be achieved.

Further, the control unit 82 controls the phase difference between the output voltage V _SVC and the system voltage V _p, and inputs / outputs between the power system and the capacitors C1, C2, C3 every cycle of the AC frequency. When the voltage V _SVC is output so that the average of the total energy to be output is adjusted to zero, the voltage ratio between the capacitors C1, C2, and C3 is set to a predetermined value (Vh: Vm: Vl = 4: Since the operation pattern for each of the self-excited inverters I1, I2, and I3 is determined so as to be as close as possible to 2: 1), the effect of this embodiment can be made more remarkable.

  Second Embodiment

  Next, a second embodiment of the self-excited reactive power compensator 1 according to the present invention will be described with reference to the drawings.

The self-excited reactive power compensator 1 according to the present embodiment differs from the first embodiment in the function of the control unit 82. That is, the control unit 82 of the present embodiment, as shown in FIG. 15, the capacitors C1, C2, C3 voltage Vh of, Vm, identical as possible with the peak value of the output voltage _{V SVC} sum (Vh + Vm + Vl) of Vl And the operation of each of the self-excited inverters I1, I2, and I3 is determined so that the ratio of the capacitor voltages Vh, Vm, and Vl maintains the relationship of Vh: Vm: Vl = 4: 2: 1. It also has a function of always outputting a voltage of 15 levels regardless of the peak value of the voltage V _SVC .

In FIG. 15, for example, the output voltage V _SVC when the output voltage changes from 105 [V] to 90 [V] and the operation timing of each of the power supply circuits 41, 42, 43 at that time are shown. . At this time, in the control unit 82 of the present embodiment, the voltages Vh, Vm, and Vl of the capacitors C1, C2, and C3 are 51.44 [V], 25.72 [V], and 12.86 [V], respectively. Thus, the self-excited inverters I1, I2, and I3 are controlled.

Further, the control unit 82 of the present embodiment limits the peak value of the output voltage V _SVC based on the withstand voltage performance and current capacity of the components of the device 1 so that the voltage of 15 levels can be output as described above. To do.

Specifically, as shown in the block diagram of FIG. 16, the provisional value | Vz | of the peak value of the output voltage V _SVC is calculated via the calculation unit (R). The calculated provisional value | Vz | is determined via the second limiter unit (T), and when the provisional value | Vz | does not exceed the withstand voltage performance of the apparatus 1 and the output current determined from the provisional value | Vz | When the current capacity of the device 1 is not exceeded, the provisional value | Vz | is determined as a _peak value | V _ref | of the target value V _ref of the output voltage V _SVC . On the other hand, if the provisional value | Vz | exceeds the withstand voltage performance of the device 1, or if the output current determined by the provisional value | Vz | The peak value | V _ref | is determined.

Here, | V _n | in FIG. 16 is a target value of the peak value of the interconnection point voltage V _t and is a constant value in the time domain. V _t is the instantaneous value in the time domain of the connection point voltage, E _c is the instantaneous value in the time domain of the total charge energy of the capacitors C1, C2, and C3, and the RMS block converts the instantaneous value into an effective value. It is. The first limiter unit (S) is provided so that the output of the previous integration unit does not diverge when an error between | V _n | and | V _t | is generated by the second limiter unit (T).

On the other hand, the target value | V _c | of the sum Vh + Vm + Vl of the capacitor voltages Vh, Vm, and Vl determines the peak value | V _ref | via the third limiter unit (U).

Next, the effective power Ps input / output to / from the capacitors C1, C2, and C3 is determined so that the difference between the charging energy E _{c of} the capacitors C1, C2, and C3 and the target value E _ref becomes zero in a steady state. The phase difference φ between the system voltage V _t for exchanging the active power Ps between the self-excited reactive power compensator 1 and the power system and the target voltage V _ref of the output voltage V _SVC by conversion using the constant K _4. Is determined. Then, the target voltage V _ref of the output voltage of the self-excited reactive power compensator 1 is calculated by the following formula to control the inverters I1, I2, and I3.

  Here, ω is the fundamental frequency of the power system.

  Next, FIG. 18 shows the result of the operation simulation of the self-excited reactive power compensator 1 with the specific condition setting shown in FIG. In this simulation, it is assumed that a voltage drop of 30% has occurred at times 2 [S] to 4 [S] after activation of the apparatus 1. The capacitances of the capacitors C1, C2, and C3 are 100 [mF], 200 [mF], and 400 [mF], respectively.

Here, the second limiter section (T) in FIG. 16 determines the range of the output voltage based on the withstand voltage performance and current capacity of the components of the apparatus 1, and the maximum limiter value is min (| V _t | +50 [V], 140 [V]), that is, the peak value of the system voltage | V _t | +50 [V] and 140 [V], and the minimum limiter value is the wave of the system voltage The high value | V _t | −50 [V]. The third limiter unit (U) is determined based on the withstand voltage performance of the components of the apparatus 1 such as the capacitors C1, C2, and C3. The maximum limiter value is 120 [V], and the minimum limiter value Is 0 [V]. The first limiter unit (S) has a maximum limiter value of 40 [V] and a minimum limiter value of −40 [V].

At this time, the voltage V _SVC that the self-excited reactive power compensator 1 should output to the power system is 140 [V], and the voltage Vh of the capacitor C1 is 56 [V] to 68 [V] as shown in FIG. The voltage Vm of the capacitor C21 is increased from 28 [V] to 34 [V], and the voltage Vl of the capacitor C3 is increased from 14 [V] to 17 [V]. The total value of these is 119 [V]. As a result, although the system voltage V _p is reduced by 30% from 100 [V] to 70 [V], the interconnection voltage V _t can be maintained at about 90 [V]. The voltage stabilization effect as a self-excited reactive power compensator can be confirmed.

According to the self-excited reactive power compensator 1 configured as described above, the magnitudes of the capacitor voltages Vh, Vm, and Vl are raised and lowered in accordance with the desired output voltage V _SVC while maintaining a 4: 2: 1 relationship. Therefore, high-accuracy voltage output of 15 levels can always be enabled regardless of the output voltage V _SVC , so that high-accuracy voltage output can be achieved without reducing the number of voltage output levels even during low-voltage output. Is possible. Further, at this time, the maximum value of the output voltage V _SVC is calculated in consideration of the withstand voltage performance and current capacity of the components of the device 1, so that stable device operation can be ensured.

  The present invention is not limited to the above embodiment.

  For example, in the embodiment, three power supply circuits are connected in series. However, the present invention is not limited to this, and two power supply circuits may be connected in series, or four or more power supply circuits may be connected in series.

  In addition, the voltage ratio of the capacitor voltage has a power-of-2 relationship, but may be configured with other voltage ratios.

  In the above-described embodiment, only one capacitor is used for one power circuit, and the output voltage is varied. However, a plurality of capacitors are connected in series to one power circuit to output different output voltages. good.

  Furthermore, in the above embodiment, a capacitor is used as the energy storage means, but the present invention is not limited to this. For example, a battery may be used.

  In addition, although the IGBT is used as the semiconductor switch element, the semiconductor switch element is not limited to this, and may be a self-extinguishing semiconductor switch element such as a gate turn-off thyristor.

  Moreover, you may use what connected those switch elements in series as one switch.

  In the above embodiment, normalization is corrected for the most dissimilarity, but other than that, the initial charge voltage is compared with the actual voltage without normalization, and the most dissimilarity is corrected. You may make it do.

  In addition to the above, in the embodiment, when the energy of the entire capacitor is adjusted, the adjustment is made by taking into consideration the total sum of the capacitor voltages, but taking into account only the capacitor voltage charging the highest voltage. Alternatively, the adjustment may be performed in consideration of two capacitor voltages.

The target voltage V _ref of Equation 1 can also be calculated using the impedance X _SVC of the reactor 10 of the device 1 by measuring the peak value and phase of the voltage V _t at the system interconnection point of the device.

  The sum of the DC voltages is not necessarily 105 [%] (= 60 [%] + 30 [%] + 15 [%]), and may be designed based on system conditions and required performance as in a general SVC.

  The present invention is not limited to a single-phase application, and can be applied to a three AC system as long as the voltage and current quantities described so far are treated as normal and negative phase components in a three-phase AC.

  In addition, in the second embodiment, when the output voltage is calculated, the first limiter unit, the second limiter unit, and the third limiter unit are provided to limit the maximum value of the output voltage. The output voltage may be calculated without providing a limiter unit.

  In addition, it goes without saying that various modifications are possible without departing from the spirit of the present invention.

As described above, the self-excited reactive power compensator according to the present invention is configured by connecting a plurality of power supply circuits having different output voltages in series, and the magnitude of the output voltage can be changed by the combination thereof. Since the number of equivalent switches of the entire inverter can be reduced, high performance and high efficiency can be realized.

Claims (8)

A self-excited reactive power compensator that is connected in parallel to a power system and supplies reactive power to the power system, thereby adjusting the voltage of the power system and improving the power factor of the load,
A power supply circuit comprising a DC power supply having a charging / discharging function and a self-excited inverter connected to the DC power supply and converting the voltage of the DC power supply into an AC voltage and outputting it to the power system is connected in series. In addition, the self-excited reactive power compensator is characterized in that the voltages of the respective DC power sources are different from each other.   2. The self-excited reactive power compensator according to claim 1, wherein the voltage ratio of each of the DC power supplies is in a power-of-two relationship.   3. The self-excited reactive power compensator according to claim 1, wherein the DC power source is a capacitor.   A control unit that controls a phase difference between the output voltage and the system voltage and adjusts so that an average sum of energy input and output between the power system and each of the DC power sources is substantially zero; 4. The self-excited reactive power compensator according to claim 1, 2, or 3.   When the control unit outputs a desired output voltage, the control unit determines an operation for each self-excited inverter so that the voltage ratio between the DC power sources is as close as possible to a predetermined value. The self-excited reactive power compensator according to claim 4.   The said control part adjusts so that the average of the electric charge amount which passes for every said DC power supply may become zero for every 1/4 cycle of AC frequency, every 1/2 cycle, or every integer cycle. 5. The self-excited reactive power compensator according to 5.   The control unit limits the upper and lower limits of the output voltage for outputting the reactive power based on the withstand voltage performance and current capacity of the component parts, and in that range, the sum of the voltages of the respective DC power supplies 7. The self-excited reactive power compensator according to claim 5 or 6, wherein the operation for each self-excited inverter is determined so as to be approximately equal to an output voltage as much as possible. A self-excited reactive power compensator that is connected in parallel to a power system and supplies reactive power to the power system, thereby adjusting the voltage of the power system and improving the power factor of the load,
A power supply circuit including a capacitor and a self-excited inverter connected to the capacitor and converting the voltage of the capacitor into an AC voltage and outputting the converted voltage to the power system is connected in series, and the output voltage and A control unit that controls the phase difference with the system voltage and adjusts the sum of energy input and output between the power system and the respective capacitors,
The voltage of each capacitor is approximately 4: 2: 1.
The control unit limits the upper and lower limits of the output voltage for outputting the reactive power based on the withstand voltage performance and current capacity of the component parts, and in that range, the sum of the capacitor voltages can be used as the output voltage. The self-excited type is characterized in that the operation of each of the self-excited inverters is determined so that the ratio of the voltages of the capacitors is approximately 4: 2: 1. Reactive power compensator.