KR101793062B1 - NPC Converting Device and Method - Google Patents

Abstract

The NPC conversion apparatus of the present invention is an NPC conversion apparatus for converting AC power into DC power, comprising: a first switch connected in series; A second switch; A third switch; A fourth switch; And during the conversion period of the forward AC, the first switch and the third switch are alternately switched to generate stepped potentials, the second switch connects the first switch and the third switch, The second switch and the fourth switch are alternately switched to generate a stepped potential while the third switch is connected to the second switch and the fourth switch during the conversion period of the alternating current, ,
In order to suppress the voltage unbalance of the DC stage, the conversion control unit turns off the second switch for a predetermined time during the conversion period of the forward AC, and turns off the third switch during the conversion period of the reverse direction AC .

Description

[0001] NPC CONVERTERING DEVICE AND METHOD [0002]

The present invention relates to an NPC conversion apparatus and an NPC conversion method, and more particularly, to an NPC conversion apparatus and an NPC conversion method suitable for a renewable energy generation field.

A power converter using a semiconductor switch device, that is, a converter or an inverter, is an essential module for controlling a renewable energy generation system that is not only an electricity / power control system but also a recent environment problem. Furthermore, demand for three-level inverters is increasing in accordance with the demand for large capacity of power converters, low total harmonic distortion (THD), and reduced filter inductance capacity.

In the case of power generation using grid-connected large-capacity renewable energy technology such as wind power generation, the voltage / current allowable range of each switching device constituting the converter is not sufficient, and a multilevel converter for high- Is used.

Conventional DC voltage control of an NPC type multilevel converter includes a DC component in its output at the time of independent coupling, and may cause magnetic saturation to the reactor component such as a transformer. Furthermore, in the case of a parallel connection of a multilevel converter for a high-voltage, high-capacity system, there is a risk that a circulating current will be generated between the parallel connected converters due to the direct current component of such output, leading to capacitor imbalance and trip.

Korean Patent Publication No. 10-2013-0004657

The present invention provides an NPC conversion apparatus and an NPC conversion method capable of performing stable power conversion control while suppressing direct current voltage unbalance.

According to an aspect of the present invention, there is provided an NPC conversion apparatus for converting AC power into DC power, comprising: a first switch connected in series; A second switch; A third switch; A fourth switch; And

The first switch and the third switch are alternately switched to generate a stepped potential while the second switch connects the first switch and the third switch, The second switch and the fourth switch are alternately switched to generate a stepped potential while the third switch is connected to the second switch and the fourth switch, Including,

In order to suppress the voltage unbalance of the DC stage, the conversion control unit turns off the second switch for a predetermined time during the conversion period of the forward AC, and turns off the third switch during the conversion period of the reverse direction AC .

Here, the first to fourth switches may include IGBTs.

Here, the conversion control unit may generate a pulse signal for switching the first to fourth switches, and may set a minimum duty and a maximum duty of the pulse.

Here, the conversion control unit may give a delay time to the rising edge to the first switch and the fourth switch, and may give a delay time to the polling edge with respect to the second switch third switch.

Here, the conversion control unit may include: a sensor input terminal for receiving a sensing signal for electrical characteristics from various sensors provided on an input side, an output side, and a DC stage; A PWM generator for outputting pulses for operating the first to fourth switches and outputting pulses satisfying conditions of minimum duty and maximum duty; And a timing adjuster for applying a predetermined delay time to a falling edge or a rising edge of the PWM signal generated by the PWM generator.

Here, the conversion control unit may further include a DC single-balanced controller for determining a minimum duty of the first to fourth switches for DC single-phase holding.

Here, the conversion control section may include: a command generation circuit for generating a sine wave command signal; And a current controller for generating a reference voltage for current control from the input sensing signals, wherein the timing adjuster is configured to control the PWM generator using the reference voltage and the minimum and maximum duty, It is possible to adjust the polling or rising timing of the PWM signal to be generated.

According to another aspect of the present invention, there is provided an NPC power conversion method including: converting a sinusoidal command signal to duty; Calculating a minimum duty and a maximum duty; Comparing the duty cycle to a triangle wave to generate a pulse that satisfies the minimum duty cycle and the maximum duty cycle; Copying the generated pulses into two pulses, giving a delay time to a rising edge of one pulse and a delay time to a polling edge of the other pulse; And applying the delayed pulse and its inverted pulse to the power conversion IGBT.

Here, before generating the pulse, the step of converting the duty to an integer value may be further included.

The NPC conversion apparatus or the NPC conversion method of the present invention according to the above-described configuration has an advantage that the DC voltage unbalance of the power conversion apparatus can be suppressed.

The NPC conversion apparatus or the NPC conversion method of the present invention can improve the quality of the output power in a single module operation. For example, the advantage of reducing the ripple of the system side converter output current and / or the damping noise (noise) of the filter reactor and / or the DC voltage ripple and / or the voltage ripple in the filter capacitor can be reduced Can be achieved.

The NPC conversion apparatus or NPC conversion method of the present invention can perform stable control in parallel operation. For example, the advantage of controlling the unbalance of the DC voltage to a certain range or less and the advantage of preventing the DC unbalance and the overcurrent phenomenon at the time of parallel connection can be achieved at the same time.

1 is a block diagram showing a power conversion system including an NPC converter according to an embodiment of the present invention and a conversion control unit for controlling the same.
FIG. 2 is a circuit diagram illustrating in detail the configuration of the NPC converter and the NPC inverter shown in FIG. 1; FIG.
FIG. 3 is a waveform diagram showing a pulse waveform to which the methods for suppressing DC short-circuit voltage imbalance according to the present invention are applied. FIG.
4 is a block diagram showing an embodiment of the conversion control unit of Fig.
5 is a block diagram illustrating a detailed structure of one embodiment of the timing regulator and PWM generator of FIG. 4;
FIG. 6 is a block diagram illustrating a detailed structure of another embodiment of the timing regulator and PWM generator of FIG. 4;
7 is a block diagram illustrating one embodiment of a DC single-balanced controller of FIG. 5 for compensating for DC imbalance;
FIG. 8 is a block diagram showing a renewable energy generation system capable of adopting a power conversion system according to an embodiment of the present invention; FIG.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

In describing the present invention, the terms first, second, etc. may be used to describe various elements, but the elements may not be limited by terms. Terms are for the sole purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being connected or connected to another element, it may be directly connected or connected to the other element, but it may be understood that other elements may be present in between .

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions may include plural expressions unless the context clearly dictates otherwise.

It is to be understood that the term " comprising, " or " comprising " as used herein is intended to specify the presence of stated features, integers, But do not preclude the presence or addition of steps, operations, elements, components, or combinations thereof.

In addition, the shapes and sizes of the elements in the drawings and the like can be exaggerated for clarity.

1 is a block diagram showing a power conversion system including an NPC converter and a conversion control unit for controlling the NPC converter according to an embodiment of the present invention.

Referring to FIG. 1, a power conversion system 100 includes an input filter 2, an NPC converter 3, an NPC inverter 4, an output filter 5, a conversion control unit 10, And capacitors 15 and 16 for generating a voltage. The direct current terminal may have a neutral line 17, a constant voltage line 13 and a negative voltage line 14 corresponding to the respective terminals of the capacitors 15 and 16. The capacitors 15 and 16 are connected in series between the constant voltage line 13 and the negative voltage line 14 to smooth the voltage between the constant voltage line 13 and the negative voltage line 14. [ And a neutral line 17, which is a connection point of the capacitors 15 and 16, is connected.

For monitoring the conversion state, the power conversion system 100 may include various voltage sensors 31, 34, 35 and current sensors 32, 37.

The input filter (2) prevents harmonic movement to the three-phase generator (1). The illustrated input filter 2 is a three-phase LC filter circuit constituted by capacitors 11R, 11S and 11T and reactors 12R, 12S and 12T.

The NPC converter 3 converts the three-phase AC power supplied from the three-phase generator 1 through the input filter 2 to DC power and supplies the three-phase AC power to the NPC inverter 3 via the constant voltage line 13 and the negative voltage line 14. [ (4). The NPC inverter 4 converts the DC power generated in the DC stage by the NPC converter 3 into three-phase AC power. In other implementations, multiple single-phase AC power can be converted.

The NPC converter 3 and the NPC inverter 4 are implemented as a so-called three-level circuit. The NPC converter 3 and the NPC inverter 4 may be constituted by a semiconductor switch including semiconductor switch elements. For example, an IGBT (Insulated Gate Bipolar Transistor) may be used as a semiconductor switch element. In addition, PWM (Pulse Width Modulation) control can be applied as a control method of the semiconductor switch element.

The AC power from the NPC inverter 4 is supplied to the system or the load 6 via the output filter 5. [ The output filter 5 removes the harmonics generated by the operation of the NPC inverter 4. [ The illustrated output filter 5 is a three-phase LC filter circuit constituted by reactors 18U, 18V and 18W and capacitors 19U, 19V and 19W.

The voltage sensor 31 detects the voltage VR of the R-phase line, the voltage VS of the S-phase line and the voltage VT of the T-phase line and outputs a three-phase voltage signal representing the voltages VR, VS, To the conversion control section (10). The current sensor 32 detects the current IR of the R-phase line, the current IS of the S-phase line and the current IT of the T-phase line and outputs a three-phase current signal To the conversion control unit (10).

The voltage between the positive voltage line 13 and the negative voltage line 14 is divided by the neutral point 21 into two voltages Ep and En. The voltage sensor 34 detects the voltage Ep at both ends of the capacitor 15 and outputs a signal indicating the voltage Ep to the conversion control section 10. [ The voltage sensor 35 detects the voltage En at both ends of the capacitor 16 and outputs a signal indicating the voltage En to the conversion control section 10. [

The conversion control unit 10 includes a three-phase voltage signal from the voltage sensor 31, a three-phase current signal from the current sensor 32, a signal indicating the voltage Ep detected by the voltage sensor 34, 35), a signal indicating the current detected by the system side (or load side) current sensor 37, and the like.

Fig. 2 is a circuit diagram illustrating in detail the configuration of the NPC converter 3 and the NPC inverter 4 shown in Fig. In the illustrated NPC converter 3, the three phases are represented by R, S, and T, and the three phases are represented by U, V, and W in the illustrated NPC inverter 4.

The conversion modules 3R, 3S, and 3T for each phase of the illustrated NPC converter 3 are each configured as a three-level circuit and include four IGBT elements and six diodes. Specifically, the R phase conversion module 3R includes IGBT elements Q1R to Q4R and diodes D1R to D6R. The S-phase conversion module 3S includes IGBT elements Q1S to Q4S and diodes D1S to D6S. The T phase conversion module 3T includes IGBT elements Q1T to Q4T and diodes D1T to D6T.

The NPC inverter 4 has the same configuration, and a duplicate description will be omitted.

Hereinafter, the symbols R, S, T, U, V, and W are collectively referred to as a symbol "x" to describe the configuration of each phase of the NPC converter 3 and the configuration of each phase of the NPC inverter 4. [ .

The IGBT elements Q1x to Q4x are connected in series between the positive voltage line 13 and the negative voltage line 14. Diodes D1x to D4x are connected in reverse parallel to IGBT elements Q1x to Q4x, respectively. The diode D5x is connected to the connection point of the IGBT elements Q1x and Q2x and the neutral point 21. The diode D6x is connected to the connection point of the IGBT elements Q3x and Q4x and the neutral point 21. The cathode of the diode D5x is connected to the connection point of the IGBT elements Q1x and Q2x and the anode of the diode D5x is connected to the neutral point 21. The anode of the diode D6x is connected to the connection point of the IGBT elements Q3x and Q4x and the cathode of the diode D6x is connected to the neutral point 21. [ Diodes D1x to D4x function as feedback diodes, and diodes D5x and D6x function as clamp diodes.

In the conversion modules 3R, 3S and 3T for each phase of the NPC converter 3, the connection points of the IGBT elements Q2x and Q3x correspond to the AC input terminals and the connection points of the diodes D5x and D6x correspond to the DC output Terminal. On the other hand, in the conversion modules 4U, 4V and 4S for each phase of the NPC inverter 4, the connection points of the diodes D5x and D6x correspond to the DC input terminals and the connection points of the IGBT elements Q2x and Q3x It corresponds to AC output terminal. The AC input terminals of the conversion modules 3R, 3S and 3T for the respective phases of the NPC converter 3 are connected to corresponding lines (R-phase line RL, S-phase line SL and T-phase line TL) The AC output terminals of the conversion modules 4U, 4V and 4S for each phase of the inverter 4 are connected to corresponding lines (U-phase line UL, V-phase line VL, W-phase line WL). The DC input terminals of the conversion modules 3R, 3S and 3T for the respective phases of the NPC converter 3 and the DC input terminals of the conversion modules 4U, 4V and 4S for the respective phases of the NPC inverter 4 And is connected to the neutral point 21.

FIG. 3 is a waveform diagram showing a pulse waveform to which the methods for suppressing DC short-circuit voltage imbalance according to the present invention are applied.

In the present invention, a direct current voltage balancing control scheme using zero voltage switching (M1 in FIG. 3) is proposed to suppress direct current voltage unbalance of an NPC converter.

For example, the conduction time of the DC terminal (+) side and the (-) side IGBT is adjusted in the switching pulse generation portion by the phase voltage reference value determined in the current controller for NPC.

In the NPC converter, four IGBTs serially connected in series between a positive voltage line and a negative voltage line of a DC stage are sequentially referred to as IGBT1, IGBT2, IGBT3, and IGBT4 from a constant voltage line. When the voltage balancing control scheme is applied, it is controlled to be turned OFF for a short time in the continuous conduction section (0 voltage application section) of the IGBT 2 or the IGBT 3 to control the DC short voltage unbalance.

This scheme has no effect on the PCS output side, and even if the DC-to-DC voltage balance control is performed on the converter side, there is an advantage that the control related to the inverter or the output side is not affected. As a result, the difficulty of control of the entire power conversion system can be reduced.

In the above method, the charging / discharging state of the DC short-circuit capacitor is changed by changing the flow direction of the current, thereby achieving a desired level of DC short-circuit voltage balance.

In addition to the zero-voltage switching scheme, a scheme for giving a dead time as a predetermined delay time (M2 in FIG. 3) may be further applied.

This compensation scheme solves the imbalance by adding a video voltage offset to the phase voltage reference value determined in the current controller in consideration of the DC capacitor voltage difference and the compensation direction (this can be referred to as a video voltage offset scheme .)

In this compensation scheme, a dead time is given as a predetermined delay time to the rising edge and / or the falling edge of all the switching pulses in order to change the effective vector size of the phase.

Generally, PWM time is calculated based on IGBT1 and IGBT4, and IGBT2 and IGBT3 are turned on / off in the opposite direction of IGBT4 and IGBT1, respectively, and dead time is applied to the rising edge of all IGBTs .

However, in the compensation scheme, the charge / discharge state of the capacitor is changed by changing the magnitude of the PCS external output current, which affects the PCS output side. Therefore, excessive application of the compensation scheme may make it difficult to control the inverter or the output stage. Therefore, it is preferable to use the compensation scheme as an additional / supplementary measure for the zero voltage switching scheme.

Referring to FIGS. 1 and 2, an NPC conversion apparatus for converting AC power into DC power using the above-described zero voltage switching scheme (M1 in FIG. 3) is described. The NPC conversion apparatus includes a first switch Q1x); A second switch Q2x; A third switch Q3x; A fourth switch Q4x; The first switch Q1x and the third switch Q3x are alternately switched to generate a stepped potential while the second switch Q2x is switched between the first switch Q1x and the second switch Q2x, Q1x and the third switch Q3x, and during the conversion period of the negative direction AC, the second switch Q2x and the fourth switch Q4x are alternately switched in reverse to generate a stepped potential, The third switch Q3x includes a conversion control unit for connecting the second switch Q2x and the fourth switch Q4x,

The conversion control unit 10 turns off the second switch Q2x for a predetermined time during the conversion period of the forward AC to remove voltage imbalance in the forward direction existing in the DC stage, The third switch Q3x is turned off for a predetermined time during the conversion period of the negative direction AC to eliminate the voltage unbalance of the third switch Q3x.

In the following description, only the R-phase of the first switch Q1x to the fourth switch Q4x is exemplarily described, but the same applies to the other S-phase and T-phase. The first switch Q1x to the fourth switch Q4x are implemented as an IGBT in which diodes are connected in parallel.

Here, the predetermined time may be referred to as a fine OFF time. As a specific method for giving the fine OFF time, a predetermined ON time during one fine OFF time calculated according to the DC unbalance unbalance degree by a predetermined algorithm during one turn- In order to perform the alternating switching operation by applying the maximum duty which is the minimum turn-on time and the maximum turn-on time in one cycle, which is the minimum turn-on time in one cycle, the minimum duty is determined according to the degree of the DC voltage unbalance There is a plan to calculate. The former method is somewhat complicated and requires a separate circuit. In the following, the latter method will be described in detail.

4 is a block diagram showing an embodiment of the conversion control unit of FIG.

The conversion control unit 10 includes a sensor input 61 receiving a signal obtained by sensing electrical characteristics (voltage, current) from various sensors installed on the input side, the output side, and the DC stage. A current controller (63) for generating a reference voltage for current control; A DC single-balanced controller 62 for determining a minimum duty of a converter IGBT for DC single-phase holding; A PWM generator 65 for outputting a pulse for operating the IGBT constituting the converter and / or the inverter; And a timing adjuster 64 for giving a predetermined delay time to the falling edge and / or the rising edge of the PWM signal generated by the PWM generator 65. [

The current controller 63 receives the voltages sensed at the input side (VR, VS, VT) and the voltage sensed at the output side voltage sensor 37, and calculates the input values according to a predetermined algorithm and / The reference voltage Vx_ref of the potential is calculated. According to the implementation, the current (IR, IS, IT) sensed at the input side or the current sensed at the output side can be used to calculate the reference voltage Vx_ref.

The DC single-phase controller 62 calculates the minimum duty signal Vsn_comp_top (bot) by receiving the DC short-circuit voltages Ep and En.

The timing adjuster 64 sets the polling / rising timing of the PWM signal generated by the PWM generator 65 using the reference voltage Vx_ref and the minimum (Vsn_comp_top (bot)) and the maximum duty Ts Adjust. The maximum duty Ts may be determined according to a fixed value, an output voltage, a load, and an electric power generation amount.

In order to generate the sine wave command signal v ^* _an , the conversion control section may further include a command generation circuit 66 for generating a sine wave command signal. For example, the command generation circuit 66 generates the command voltage VR, VS, VT detected by the voltage sensor 31, the currents IR, IS, IT detected by the current sensor 32 and the DC short- En), and generates a sine wave command signal corresponding to the R phase, the S phase, and the T phase, respectively.

5 is a block diagram illustrating the detailed structure of one embodiment of the timing adjuster 64 and PWM generator 65 of FIG.

The timing adjuster 64 may include two interval calculators 82 and 84 and an inverter 81, two duty limiters 85 and 86 and a limit switch 89. The PWM generator 65 may include two pulse generators 87, 88 and two inverters 91, 92.

The switching signals output from the two pulse generators 87 and 88 are inverted by the two inverters 91 and 92 to form a total of four PWM signals and are delayed by the delay units 93 through 96 for a predetermined time After the dead time is applied, the four IGBT driving signals G_IGBT1, G_IGBT2, G_IGBT3, and G_IGBT4 are applied to the gate terminals of the IGBTs.

The limit switch 89 shown in the figure receives the minimum duty signal Vsn_comp_top (bot) from the DC single-phase controller 62 and selectively transfers the minimum duty signal Vsn_comp_top (bot) to the two duty limiters 85 and 86.

In the figure, the limiting switch 89 and the duty limiter 85, 86 may perform the above-described zero voltage switching scheme in order to improve DC short-circuit unbalance. The pulse generators 87 and 88 may perform the delay time for the zero voltage switching and / or the dead time according to the image partial voltage offset scheme described above.

In the figure, the delay for the same rising edge is applied by the four delay units 93 to 96, and the dead time according to the image partial voltage offset scheme described above is applied.

The interval calculators 82 and 84 calculate a turn-on interval (a long turn-on interval for IGBT2 and IGBT3 in Fig. 3) using the reference voltage Vx_ref and the sine wave command signal.

6 is a block diagram illustrating the detailed structure of another embodiment of the timing adjuster 64 and PWM generator 65 of FIG.

The illustrated embodiment includes a duty converter 182 that generates duty; A duty limiter (185, 186) limiting the minimum and maximum of the duty; An integer converter (195, 196) for converting the output signal of the duty limiter to an integer; A waveform comparator (187, 188) for comparing the signal output from the integer converter (195, 196) with a triangular wave to generate a pulse; Delays (191-144) for giving a predetermined delay time to the rising edge and the falling edge of the pulse generated by the waveform comparators (187, 188); And inverters (198, 199) for inverting the output signal of the delay.

The duty converter 182 converts a sinusoidal command value (sinusoidal command signal) into a duty. It also has an inverter 183 for separating the converted signal into two mutually inverted signals.

The duty is generally limited to 0 to Ts (maximum duty), which limits the duty limiters 185 and 186 to the minimum duty according to the teachings of the present invention. Vsn_comp_top is applied to the duty limiter 185 as the minimum duty, and Vsn_comp_bot is applied to the duty limiter 186. [

The integer converters 195 and 196 digitally convert them to integer values for triangular wave comparison. But may be omitted for other implementations using analog comparator circuits.

The waveform comparators 187 and 188 generate pulses by comparing the signals output from the integer converters 195 and 196 with triangular waves. Here, the comparative triangular waves use only those having a phase difference of 180 degrees with respect to each other. As a result of limiting the minimum duty in the duty limiters 185 and 186, the pulses generated by the waveform comparators 187 and 188 have short pulses IS that are close to the impulse even in the OFF period .

The delay units 191 to 194 give a predetermined delay time (which may be regarded as a kind of dead time) to the rising edge and the falling edge of the pulse generated by the waveform comparators 187 and 188. At this time, each signal is separated and delay time is applied. The rising signal is delayed at the rising edge and the falling signal is delayed at the falling edge. The delay units 191 and 193 remove the short pulses of the IGBT 1 or 4 on the IGBT through the rising signal delay. And the delay units 192 and 194 maintain the short pulses OS of the IGBT 2 or 3 in the OFF direction through the falling signal delay. As a result, the OFF operation for a short time in the continuous conduction section for the zero voltage switching scheme according to the present invention is performed.

The delay time by the delay units 191 and 193 is generally shorter than the dead time in the above-described zero voltage switching scheme since only a time for removing short pulses close to the impulse can be secured.

The pulse generated by the above process is applied to the gate of the corresponding IGBT for use as a switching signal.

In FIG. 6, not only the detailed structure of the timing regulator 64 and the PWM generator 65 of FIG. 4, but also the NPC power conversion method is represented.

The NPC power conversion method comprises: converting a sinusoidal command signal to duty (S101); Calculating a minimum duty and a maximum duty (S102); Converting the duty to an integer value (S103); Comparing the duty to a triangle wave to generate a pulse that satisfies the minimum duty cycle and the maximum duty cycle (S104); A step (S105) of copying the generated pulses in two, giving a delay time to a rising edge for one pulse and a delay time for a polling edge for another pulse; And applying the delayed pulse and its inverted pulse to the power conversion IGBT (S106).

As shown in the figure, the step S101 is performed in the duty converter 182, the step S102 is performed in the duty limiters 185 and 186, and the step S103 is performed in the integer converters 195 and 196 And the step S104 is performed in the waveform comparators 187 and 188 and the step S105 is performed in the delay units 191 to 194 and the step S106 is performed in the inverters 198 and 199 .

FIG. 7 is a block diagram illustrating one embodiment of a DC single-phase controller 62 of FIGS. 4 and 5 to compensate for DC imbalance.

The illustrated DC single-phase controller 62 receives the voltage (V _dcP ) of the upper stage capacitor of the DC stage and the voltage (V _dcN ) of the lower stage capacitor as an input signal and _{calculates the} minimum duty signal Vsn_comp_top, Vsn_comp_bot).

112 to 120 are blocks for calculating the duty, wherein the generated signal Vsn_comp is separated by the inverter 131 and is divided into two groups according to the compensation direction for one of IGBT 2 and IGBT 3 Only one of the separated signals (Vsn_comp_bot, Vsn_comp_top) is outputted. As a result, when the upper capacitor voltage is large, short pulses in the OFF direction for the balance control are applied to the turn-on period of the IGBT 2, and when the upper capacitor voltage is small, short pulses in the OFF direction for the balance control are applied to the turn- do.

Depending on the implementation, the minimum duty signal (Vsn_comp_bot, Vsn_comp_top) input to the duty limiter 185, 186 of FIG. 6 may be determined as a discontinuous value according to the table shown in Table 1 below.

FIG. 8 shows a renewable energy generation system capable of adopting a power conversion system according to an embodiment of the present invention.

It is a matter of course that the illustrated power generation system has a structure in which power conversion systems (including the converter 1003 and the inverter 1004) for two generators are connected in parallel and three or more power conversion systems can be connected in parallel.

The converter 1003 of each power conversion system may be an NPC converter according to the principles of the present invention. A controller 1010 for controlling the conversion operation of each power conversion system and a main controller 2000 for controlling the power conversion operation of the entire power generation system. The conversion control unit 10 according to an embodiment of the present invention includes the controller 1010 And / or a main controller 2000.

Even when two or more power conversion systems are connected in parallel, the voltage unbalance suppressing scheme using the zero voltage switching according to the present invention is applied to control the unbalance of the DC voltage to a certain range or less . That is, when the power conversion system is connected in parallel, the DC unbalance and the overcurrent phenomenon can be eliminated, and the reactor noise can be reduced.

It should be noted that the above-described embodiments are intended to be illustrative, not limiting. In addition, it will be understood by those of ordinary skill in the art that various embodiments are possible within the scope of the technical idea of the present invention.

2: Input filter 3: NPC converter
4: NPC inverter 5: Output filter
10:
15, 16: DC short-circuit capacitor
61: sensor input terminal 62: DC single-phase controller
63: current controller 64: timing regulator
65: PWM generator 66: Command generation circuit

Claims (9)

An NPC converter for converting AC power into DC power, comprising:
A first switch connected in series; A second switch; A third switch; A fourth switch; And
During the conversion period of the forward AC, the first switch and the third switch are alternately switched to generate a stepped potential, and the second switch connects the first switch and the third switch,
During the conversion period of the negative direction AC, the second switch and the fourth switch are alternately switched to generate stepped potentials, and the third switch controls to connect the second switch and the fourth switch And a conversion control unit,
In order to suppress the voltage unbalance of the DC stage, the conversion control unit turns off the second switch for a predetermined time during the conversion period of the forward AC,
The third switch is turned off for a predetermined time during the conversion period of the negative direction AC,
Wherein the conversion control unit comprises:
Generating a pulse signal for switching the first to fourth switches,
Setting a minimum duty and a maximum duty of the pulse,
Wherein the conversion control unit comprises:
A delay time is given to the rising edge for the first switch and the fourth switch,
A delay time is given to the polling edge for the second switch and the third switch,
Wherein the delay time is shorter than the turning-off time.
The method according to claim 1,
And the first to fourth switches include IGBTs.
delete delete An NPC converter for converting AC power into DC power, comprising:
A first switch connected in series; A second switch; A third switch; A fourth switch; And
During the conversion period of the forward AC, the first switch and the third switch are alternately switched to generate a stepped potential, and the second switch connects the first switch and the third switch,
During the conversion period of the negative direction AC, the second switch and the fourth switch are alternately switched to generate stepped potentials, and the third switch controls to connect the second switch and the fourth switch And a conversion control unit,
In order to suppress the voltage unbalance of the DC stage, the conversion control unit turns off the second switch for a predetermined time during the conversion period of the forward AC,
The third switch is turned off for a predetermined time during the conversion period of the negative direction AC,
Wherein the conversion control unit comprises:
A sensor input terminal for receiving a sensing signal for electrical characteristics from various sensors installed on an input side, an output side, and a DC stage;
A PWM generator for outputting pulses for operating the first to fourth switches and outputting pulses satisfying conditions of minimum duty and maximum duty; And
And a timing adjuster for giving a predetermined delay time to a falling edge or a rising edge of the PWM signal generated by the PWM generator,
Wherein the delay time is shorter than the turning-off time.
6. The method of claim 5,
Wherein the conversion control unit comprises:
And a DC single-balanced controller for determining a minimum duty of said first to fourth switches for DC single-phase holding.
The method according to claim 6,
Wherein the conversion control unit comprises:
A command generation circuit for generating a sine wave command signal; And
Further comprising a current controller for generating a reference voltage for current control from the input sensing signals,
Wherein the timing adjuster adjusts the polling or rising timing of the PWM signal generated by the PWM generator using the reference voltage, the minimum and maximum duty, and the sine wave command signal.
Converting a sinusoidal command signal to duty;
Calculating a minimum duty and a maximum duty;
Comparing the duty cycle to a triangle wave to generate a pulse that satisfies the minimum duty cycle and the maximum duty cycle;
Copying the generated pulses into two pulses, giving a delay time to a rising edge of one pulse and a delay time to a polling edge of the other pulse; And
Applying the delayed pulse and its inverted pulse to the power conversion IGBT
Lt; / RTI >
Wherein the delay time is shorter than the time for turning off the pulse for a predetermined time to suppress voltage imbalance of the DC stage.
9. The method of claim 8,
Before generating the pulse,
Converting the duty to an integer value;
Wherein the NPC power conversion method further comprises:

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