JPWO2002063473A1 - データ処理システムの開発方法及び評価ボード - Google Patents
データ処理システムの開発方法及び評価ボード Download PDFInfo
- Publication number
- JPWO2002063473A1 JPWO2002063473A1 JP2002563350A JP2002563350A JPWO2002063473A1 JP WO2002063473 A1 JPWO2002063473 A1 JP WO2002063473A1 JP 2002563350 A JP2002563350 A JP 2002563350A JP 2002563350 A JP2002563350 A JP 2002563350A JP WO2002063473 A1 JPWO2002063473 A1 JP WO2002063473A1
- Authority
- JP
- Japan
- Prior art keywords
- evaluation
- user
- logic device
- data
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2001/000754 WO2002063473A1 (fr) | 2001-02-02 | 2001-02-02 | Procede de developpement d'un systeme de traitement de donnees et tableau d'evaluation |
Publications (1)
Publication Number | Publication Date |
---|---|
JPWO2002063473A1 true JPWO2002063473A1 (ja) | 2004-06-10 |
Family
ID=11736986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002563350A Withdrawn JPWO2002063473A1 (ja) | 2001-02-02 | 2001-02-02 | データ処理システムの開発方法及び評価ボード |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPWO2002063473A1 (zh) |
TW (1) | TW515964B (zh) |
WO (1) | WO2002063473A1 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4264422B2 (ja) | 2005-03-16 | 2009-05-20 | 富士通株式会社 | 負荷制御機能付き速度変換装置 |
JP5975811B2 (ja) | 2012-09-12 | 2016-08-23 | レノボ・エンタープライズ・ソリューションズ(シンガポール)プライベート・リミテッド | 計測した信号トレースデータのインテグリティ・チェック |
CN109100579B (zh) * | 2018-11-07 | 2024-01-05 | 国网河南省电力公司郑州供电公司 | 一种三相不平衡监测装置的高速数据采集系统及方法 |
CN111752798B (zh) * | 2020-06-23 | 2022-12-27 | 深圳市得一微电子有限责任公司 | 一种固态存储设备空闲时稳定性分析数据收集方法 |
CN112100954B (zh) * | 2020-08-31 | 2024-07-09 | 北京百度网讯科技有限公司 | 验证芯片的方法、装置和计算机存储介质 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6293736A (ja) * | 1985-10-19 | 1987-04-30 | Ricoh Co Ltd | 開発用半導体装置の製造方法 |
JPH01162971A (ja) * | 1987-09-09 | 1989-06-27 | Hitachi Ltd | シングルチップマイクロコンピュータ |
JPH0836504A (ja) * | 1994-07-26 | 1996-02-06 | Hitachi Ltd | エミュレータ |
JPH10320230A (ja) * | 1997-05-21 | 1998-12-04 | Fujitsu Ltd | エミュレータ |
US6314550B1 (en) * | 1997-06-10 | 2001-11-06 | Altera Corporation | Cascaded programming with multiple-purpose pins |
-
2001
- 2001-02-02 WO PCT/JP2001/000754 patent/WO2002063473A1/ja active Application Filing
- 2001-02-02 JP JP2002563350A patent/JPWO2002063473A1/ja not_active Withdrawn
- 2001-02-27 TW TW090104575A patent/TW515964B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW515964B (en) | 2003-01-01 |
WO2002063473A1 (fr) | 2002-08-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20080513 |