JPS6489929A - No-break power unit - Google Patents

No-break power unit

Info

Publication number
JPS6489929A
JPS6489929A JP62243607A JP24360787A JPS6489929A JP S6489929 A JPS6489929 A JP S6489929A JP 62243607 A JP62243607 A JP 62243607A JP 24360787 A JP24360787 A JP 24360787A JP S6489929 A JPS6489929 A JP S6489929A
Authority
JP
Japan
Prior art keywords
signal
latching relay
output
elapsing
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62243607A
Other languages
Japanese (ja)
Inventor
Hiroyuki Hatakeyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Takamisawa Cybernetics Co Ltd
Original Assignee
Takamisawa Cybernetics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Takamisawa Cybernetics Co Ltd filed Critical Takamisawa Cybernetics Co Ltd
Priority to JP62243607A priority Critical patent/JPS6489929A/en
Publication of JPS6489929A publication Critical patent/JPS6489929A/en
Pending legal-status Critical Current

Links

Landscapes

  • Power Sources (AREA)
  • Stand-By Power Supply Arrangements (AREA)

Abstract

PURPOSE:To increase available efficiency of data processing by providing a timer circuit to output a reset signal to a latching relay after elapsing a variable setting time from power failure detection. CONSTITUTION:On the occasion of using, users set a required back up time at volume 19. If commercial power supply is normal, a latching relay 6 is kept in a set condition by a set signal 10, and a contact 7 is turned on. If electrical power fails, a signal 17 of a power failure detection circuit 16 becomes active, DC from a battery 5 is converted into AC to output to an output terminal 26. Simultaneously, a timer circuit 18 wakes up, and the latching relay 6 is kept in a resetting condition by a signal 20 after elapsing previously set time. According to the constitution, the contact 7 is disconnected to stop the supply of power to a control circuit 12.
JP62243607A 1987-09-30 1987-09-30 No-break power unit Pending JPS6489929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62243607A JPS6489929A (en) 1987-09-30 1987-09-30 No-break power unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62243607A JPS6489929A (en) 1987-09-30 1987-09-30 No-break power unit

Publications (1)

Publication Number Publication Date
JPS6489929A true JPS6489929A (en) 1989-04-05

Family

ID=17106329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62243607A Pending JPS6489929A (en) 1987-09-30 1987-09-30 No-break power unit

Country Status (1)

Country Link
JP (1) JPS6489929A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106067797A (en) * 2016-07-08 2016-11-02 浙江众合科技股份有限公司 Realize the self-sustaining circuit of wake module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106067797A (en) * 2016-07-08 2016-11-02 浙江众合科技股份有限公司 Realize the self-sustaining circuit of wake module
CN106067797B (en) * 2016-07-08 2023-06-13 浙江众合科技股份有限公司 Circuit for realizing self-holding of wake-up module

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