JPS6486529A - Prober - Google Patents

Prober

Info

Publication number
JPS6486529A
JPS6486529A JP62242701A JP24270187A JPS6486529A JP S6486529 A JPS6486529 A JP S6486529A JP 62242701 A JP62242701 A JP 62242701A JP 24270187 A JP24270187 A JP 24270187A JP S6486529 A JPS6486529 A JP S6486529A
Authority
JP
Japan
Prior art keywords
chip
gate
picture
element density
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62242701A
Other languages
Japanese (ja)
Inventor
Kazunori Sakata
Ryozo Hiraga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP62242701A priority Critical patent/JPS6486529A/en
Publication of JPS6486529A publication Critical patent/JPS6486529A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • G06T7/0008Industrial image inspection checking presence/absence
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30148Semiconductor; IC; Wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Image Analysis (AREA)

Abstract

PURPOSE:To conduct a probing test with high reliability in a short time by a method wherein the dispersion value of the picture-element density on the periphery in a chip near the center of a substrate is stored, the dispersion value of a picture-element density is measured at a part where the presence of the chip is indistinct, the result of the measurement and the stored picture-element density dispersion value are compared, and the presence of each measuring region chip is judged automatically. CONSTITUTION:The position of a chip 27 at a position nearest to the center of a wafer is computed from the information of a chip array previously stored in a memory, and the measured values of gates T1-T4 are stored respectively to the memory, using the gates as templates. The presence of chips is decided respectively to chip arrays mutually adjacent in the Y direction by employing the templates T1-T4. When there are chips at the positions of a gate G1 and a gate G2 separately, the same or extremely close value is acquired when the results of the measurement of the picture-element density dispersion values of the gate G1 and the template T1 and the gate G2 and the template T2 are compared. When different values are obtained, on the contrary, the absence of chips can be decided.
JP62242701A 1987-09-29 1987-09-29 Prober Pending JPS6486529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62242701A JPS6486529A (en) 1987-09-29 1987-09-29 Prober

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62242701A JPS6486529A (en) 1987-09-29 1987-09-29 Prober

Publications (1)

Publication Number Publication Date
JPS6486529A true JPS6486529A (en) 1989-03-31

Family

ID=17092960

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62242701A Pending JPS6486529A (en) 1987-09-29 1987-09-29 Prober

Country Status (1)

Country Link
JP (1) JPS6486529A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008109820A1 (en) * 2007-03-08 2008-09-12 Kla-Tencor Corporation Methods for identifying array areas in dies formed on a wafer and methods for setting up such methods
US7894659B2 (en) 2007-02-28 2011-02-22 Kla-Tencor Technologies Corp. Methods for accurate identification of an edge of a care area for an array area formed on a wafer and methods for binning defects detected in an array area formed on a wafer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7894659B2 (en) 2007-02-28 2011-02-22 Kla-Tencor Technologies Corp. Methods for accurate identification of an edge of a care area for an array area formed on a wafer and methods for binning defects detected in an array area formed on a wafer
US8213705B2 (en) 2007-02-28 2012-07-03 Kla-Tencor Technologies Corp. Methods for accurate identification of an edge of a care area for an array area formed on a wafer and methods for binning defects detected in an array area formed on a wafer
WO2008109820A1 (en) * 2007-03-08 2008-09-12 Kla-Tencor Corporation Methods for identifying array areas in dies formed on a wafer and methods for setting up such methods
US7925072B2 (en) 2007-03-08 2011-04-12 Kla-Tencor Technologies Corp. Methods for identifying array areas in dies formed on a wafer and methods for setting up such methods

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