JPS5896259A - Measuring method for supply current, etc. of semiconductor integrated circuit - Google Patents

Measuring method for supply current, etc. of semiconductor integrated circuit

Info

Publication number
JPS5896259A
JPS5896259A JP56198258A JP19825881A JPS5896259A JP S5896259 A JPS5896259 A JP S5896259A JP 56198258 A JP56198258 A JP 56198258A JP 19825881 A JP19825881 A JP 19825881A JP S5896259 A JPS5896259 A JP S5896259A
Authority
JP
Japan
Prior art keywords
current
integrated circuit
semiconductor integrated
measurement
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56198258A
Other languages
Japanese (ja)
Inventor
Tsutomu Hata
務 秦
Kazutoshi Miyamoto
和俊 宮本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56198258A priority Critical patent/JPS5896259A/en
Publication of JPS5896259A publication Critical patent/JPS5896259A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2884Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To shorten a time required for measuring a current value, etc. by incorporating a discriminating means into a semiconductor integrated circuit. CONSTITUTION:Measurement is made in such a manner that, after an input signal is impressed from an input terminal 4 so as to determine the state of the inside, a contact 14 is opened and a voltage made to fall by an outside resistor 13 is compared with a reference voltage 12 (equivalent to the norm of a current) by a comparison circuit 15. The result of the comparison is latched on a latch circuit 17, and a latch output 11 is discriminated at a time point whereat all the measurements are ended, whereby it is made clear whether a supply current or a supply leakage current is within a norm or not. By this method, a time required for reading a value of a conventional ammeter can be shortened sharply. In addition, a current can be measured simultaneously when a function test is performed, and therefore, the measurement can be conducted without inputting any specific input signal for measurement of the current. Thus, the time can be shortened sharply also in this regard.

Description

【発明の詳細な説明】 この発明は、半導体集積回路の電源電流等の測定方法に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for measuring power supply current, etc. of a semiconductor integrated circuit.

従来、半導体集積回路の電源電流本しくは電源リーク電
流の測定の方法は第1図に示す方法で行なっていた。同
図において、(1)は半導体集積回路、(2)は電源端
子、(3)は接地端子、(4)は入力端子、(6)は電
源電流もしくは電源リーク電流測定用の電流針、(6)
は電源、(7)は入力信号を発生させるパルス発生器で
ある。
Conventionally, the method shown in FIG. 1 has been used to measure the power supply current or power supply leakage current of a semiconductor integrated circuit. In the figure, (1) is a semiconductor integrated circuit, (2) is a power supply terminal, (3) is a ground terminal, (4) is an input terminal, (6) is a current needle for measuring power supply current or power supply leakage current, ( 6)
is a power supply, and (7) is a pulse generator that generates an input signal.

つぎに、測定方法について説明する。Next, the measurement method will be explained.

集積度の大きい集積回路(1)においては電源電流もし
くは電源リーク電流の測定を行なう場合、ある1つの状
態のみの測定では回路の一部しか評価できず、このため
入力端子(4)よ〕入入力量を印加して内部状態を設定
して、何rjjiも測定を行なわなければならない、す
なわち、所望の内部状態を設定するために、パルス発生
器(7)を使用し、入力端子(4)よυ入力信号を入力
する。その後パルス発生器(γ)の動作を停止させて、
電流針(6)Kよシミ源電流1しくは電源リーク電流を
測定する。続いて。
When measuring the power supply current or power supply leakage current in an integrated circuit (1) with a large degree of integration, only a part of the circuit can be evaluated by measuring only one state. Any rjji measurement must be made by applying an input quantity to set the internal state, i.e. to set the desired internal state, a pulse generator (7) is used and the input terminal (4) Input the yoυ input signal. After that, stop the operation of the pulse generator (γ),
Measure the stain source current 1 or power source leak current using the current needle (6) K. continue.

集積回路(1)を始めの状態とは異なる状態に設定する
ため、入力信号を変えて印加し、上記と同様の方法で測
定する。このようなことを繰)返して集積9回路(1)
の全ての状態において測定することによル、該集積回路
(1)の評価を行なっている。
To set the integrated circuit (1) in a state different from its initial state, different input signals are applied and measured in the same manner as described above. By repeating this process, we integrated 9 circuits (1)
The integrated circuit (1) is evaluated by measuring it in all states.

しかるに、上記従来の測定方法では、1rj!iの灘定
につ龜、入力信号を印加する時間や入力信号の印加を停
止してから電流計(6)が安定するまでの時間、さらに
電流を測定する時間等を要するから、集積度の大きい半
導体集積回路(1)の場合には、莫大な時間がかかつて
しまうという欠点があった。
However, in the conventional measurement method described above, 1rj! In order to determine the value of i, it takes time to apply the input signal, time for the ammeter (6) to stabilize after stopping the application of the input signal, and time to measure the current. In the case of a large semiconductor integrated circuit (1), there is a drawback that it takes an enormous amount of time.

この発明は、半導体集積回路に判定手段を内蔵させるこ
とによシ、電流値等の測定時間の短縮化を図ることがで
色る半導体集積回路の電源電流等の測定方法を提供する
ことを目的としている。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for measuring power supply current, etc. of a semiconductor integrated circuit, which can reduce the time required to measure current values, etc. by incorporating a determination means into the semiconductor integrated circuit. It is said that

以下、この発明の一実施例を図面にしたがって説明する
An embodiment of the present invention will be described below with reference to the drawings.

第2図はこの発明に係る半導体集積回路の電源電流等の
測定方法を説明するためのもので、第1図と同一部所に
は同一符号を付して説明を省略する。同図において、(
8)は下達する比較回路の一方の入力端子に基準電圧を
与える端子、(9)は電流測定のタイミングを与えるス
トローブ端子、(至)はリセット端子、(ロ)は判定結
果を出力する出力端子、(ロ)は基準電圧を与える電源
、(至)は電流を電圧に変換する外部抵抗器、(2)は
電流側定時以外は短絡されているリレー等の接点、(ロ
)は回路(1)自体に内蔵されて後述するラッチ回路と
で判定手段(ロ)を構成する比較回路、に)は同じく内
蔵されているナンVゲーFであ〕、ラッチ回路(ロ)を
構成している。接点(ロ)は測定スピードを上げるため
にスイッチングトランジスタなどを用いて無接点式にす
ることもできる。
FIG. 2 is for explaining a method for measuring power supply current, etc. of a semiconductor integrated circuit according to the present invention, and the same parts as in FIG. In the same figure, (
8) is a terminal that provides a reference voltage to one input terminal of the comparator circuit, (9) is a strobe terminal that provides timing for current measurement, (to) is a reset terminal, and (b) is an output terminal that outputs the judgment result. , (b) is a power supply that provides a reference voltage, (to) is an external resistor that converts current to voltage, (2) is a contact such as a relay that is short-circuited except for the fixed time on the current side, and (b) is a circuit (1). ) is built in itself and constitutes the determination means (b) with a latch circuit which will be described later; and (b) is also a built-in number V gate F] which constitutes the latch circuit (b). The contact point (b) can also be made non-contact type by using a switching transistor or the like to increase the measurement speed.

つぎに、動作について説明する。Next, the operation will be explained.

測定は従来の方法と同様に内部の状態を決めるために入
力端子(4)よ〕入入力量を印加した後、接点に)を間
色、外部抵抗器(ロ)によ〕電電圧下した電圧を、比較
回路(2)によ)基準電圧Ql(電流の規格に相当する
)と比較させる。その結果をラッチ回路αηにラッチし
、全ての測定が終了した時点で。
As with the conventional method, in order to determine the internal state, the input voltage was applied to the input terminal (4), and then the voltage was lowered by the external resistor (b). The voltage is compared with a reference voltage Ql (corresponding to the current standard) by a comparator circuit (2). The result is latched into the latch circuit αη, and when all measurements are completed.

ラッチ出力(ロ)を判別することによ)、電源電流龜し
くは電源リータ電流が規格内であるか否かが判る。
By determining the latch output (b), it can be determined whether the power supply current or power supply leater current is within the standard.

この方法によれば、従来の電流計の値を読みとる時間が
、大幅に短縮で籾る。tた7アンタシ冒ンテストを行な
う時に同時に電流測定ができるので、電流測定用の入力
信号をそのために入力させることなく測定でき、この点
でも、大幅な時間短縮ができる。
According to this method, the time it takes to read the value of a conventional ammeter can be significantly shortened. Since the current can be measured at the same time as the two-dimensional test, the measurement can be performed without inputting an input signal for current measurement, and in this respect as well, the time can be significantly reduced.

なお、外部抵抗器(ロ)も半導体集積回路(1)に内蔵
させてもよく、また判定手段(至)はラッチ回路αηを
なくして比較回路に)のみで構成して測定の毎に比較回
路(2)からの出力を判別するようにして亀よい。
Note that the external resistor (b) may also be built into the semiconductor integrated circuit (1), and the determination means (to) may be constructed only by eliminating the latch circuit αη and replacing it with a comparison circuit. It is easy to judge the output from (2).

以上のように、この発明によれば、半導体集積回路自体
にチップ面積の増大を来たさない判定手段を内蔵させる
ととによシ、集積度の大白い集積回路であっても電源電
流等の測定を迅速に行なえる効果がある。
As described above, according to the present invention, it is advantageous to incorporate a determination means that does not increase the chip area in the semiconductor integrated circuit itself, and even in a highly integrated circuit, the power supply current, etc. This has the effect of allowing quick measurements.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体集積回路の電源電流等の測定方法
の説明図、第2図はこの発明に係る半導体集積回路の電
源電流等の測定方法の説明図である。 (1)−半導体集積回路、(2)−・・電源端子、(3
)・・・接地端子、(4)−・入力端子、(7)−・パ
ルス発生器、(8)・・・基準電圧印加端子、(至)・
・・外部抵抗器、(ロ)−比較回路、(ロ)・・・ラッ
チ回路、(ホ)・・・判定手段。 なお、図中同一符号は同一もしくは相当部分を示す。 代理人 葛舒信−(外1名)
FIG. 1 is an explanatory diagram of a conventional method for measuring power supply current, etc. of a semiconductor integrated circuit, and FIG. 2 is an explanatory diagram of a method of measuring power supply current, etc. of a semiconductor integrated circuit according to the present invention. (1) - Semiconductor integrated circuit, (2) - Power supply terminal, (3
)...Ground terminal, (4)--Input terminal, (7)--Pulse generator, (8)...Reference voltage application terminal, (to)-
...external resistor, (b) - comparison circuit, (b) ... latch circuit, (e) ... determination means. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent: Ge Shuxin (1 other person)

Claims (1)

【特許請求の範囲】[Claims] (1)基準電圧が印加される判定手段と半導体集積回路
の電源端子もしくは接地端子に接続される外部抵抗器の
うち、少なくとも上記判定手段を上記半導体集積回路に
内蔵させ、半導体集積回路の入力端子に入力信号を印加
したのちの上記外部抵抗器の電圧降下分を上記判定手段
にょシ基準電圧と比較し、この判定手段からの出力から
電流値が規格内であるか否かを判別することを特徴とす
る半導体集積回路の電源電流等の測定方法。
(1) Out of the determination means to which a reference voltage is applied and the external resistor connected to the power supply terminal or the ground terminal of the semiconductor integrated circuit, at least the determination means is built into the semiconductor integrated circuit, and the input terminal of the semiconductor integrated circuit The voltage drop across the external resistor after applying an input signal to the external resistor is compared with the reference voltage of the determining means, and it is determined from the output from the determining means whether or not the current value is within the standard. A method for measuring power supply current, etc. of semiconductor integrated circuits.
JP56198258A 1981-12-04 1981-12-04 Measuring method for supply current, etc. of semiconductor integrated circuit Pending JPS5896259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56198258A JPS5896259A (en) 1981-12-04 1981-12-04 Measuring method for supply current, etc. of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56198258A JPS5896259A (en) 1981-12-04 1981-12-04 Measuring method for supply current, etc. of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5896259A true JPS5896259A (en) 1983-06-08

Family

ID=16388131

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56198258A Pending JPS5896259A (en) 1981-12-04 1981-12-04 Measuring method for supply current, etc. of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5896259A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0386804A2 (en) * 1989-01-10 1990-09-12 Koninklijke Philips Electronics N.V. Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement
EP0757254A2 (en) * 1995-08-04 1997-02-05 Siemens Aktiengesellschaft Integrated circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0386804A2 (en) * 1989-01-10 1990-09-12 Koninklijke Philips Electronics N.V. Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement
EP0757254A2 (en) * 1995-08-04 1997-02-05 Siemens Aktiengesellschaft Integrated circuit
EP0757254A3 (en) * 1995-08-04 1998-01-07 Siemens Aktiengesellschaft Integrated circuit

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