JPS6484642A - Semiconductor device equipped with multilayer interconnection structure - Google Patents
Semiconductor device equipped with multilayer interconnection structureInfo
- Publication number
- JPS6484642A JPS6484642A JP24222887A JP24222887A JPS6484642A JP S6484642 A JPS6484642 A JP S6484642A JP 24222887 A JP24222887 A JP 24222887A JP 24222887 A JP24222887 A JP 24222887A JP S6484642 A JPS6484642 A JP S6484642A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- pad
- gnd
- checking
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To determine whether a through-hole contact may be accepted as good or not by a method wherein a checking pattern for measuring through-hole resistance is provided with through-hole resistors connected in series and an end of the pattern is connected to a probing pad for checking and the other end to a GND wiring. CONSTITUTION:In a checking pattern 1 for measuring through-hole resistance, through-hole resistors r1, r2,...rn are connected in series. On the periphery or a semiconductor device of this design, there are a GND wiring 3 and a GND pad 4. An end of the checking pattern I is connected to a probing pad 2 for checking and the other end to the GND pad 4 through the GND wiring 3. A voltage is applied across the probing pad 2 and the GND pad 4 and the current is detected. In this way, the series resistance to be presented by the through-hole resistors r1, r2,...rn may be measured with ease, which enables a decision on the through-hole contact in terms of its acceptability.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24222887A JPS6484642A (en) | 1987-09-26 | 1987-09-26 | Semiconductor device equipped with multilayer interconnection structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24222887A JPS6484642A (en) | 1987-09-26 | 1987-09-26 | Semiconductor device equipped with multilayer interconnection structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6484642A true JPS6484642A (en) | 1989-03-29 |
Family
ID=17086139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24222887A Pending JPS6484642A (en) | 1987-09-26 | 1987-09-26 | Semiconductor device equipped with multilayer interconnection structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6484642A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006319307A (en) * | 2005-05-11 | 2006-11-24 | Samsung Sdi Co Ltd | Semiconductor device and method for manufacturing same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114356A (en) * | 1980-02-13 | 1981-09-08 | Nec Corp | Semiconductor device |
-
1987
- 1987-09-26 JP JP24222887A patent/JPS6484642A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114356A (en) * | 1980-02-13 | 1981-09-08 | Nec Corp | Semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006319307A (en) * | 2005-05-11 | 2006-11-24 | Samsung Sdi Co Ltd | Semiconductor device and method for manufacturing same |
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