JPS6482719A - Monitoring system for multiple converter - Google Patents

Monitoring system for multiple converter

Info

Publication number
JPS6482719A
JPS6482719A JP23871287A JP23871287A JPS6482719A JP S6482719 A JPS6482719 A JP S6482719A JP 23871287 A JP23871287 A JP 23871287A JP 23871287 A JP23871287 A JP 23871287A JP S6482719 A JPS6482719 A JP S6482719A
Authority
JP
Japan
Prior art keywords
unipolar
code converting
multiple converter
bipolar
converting circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23871287A
Other languages
Japanese (ja)
Inventor
Katsumasa Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP23871287A priority Critical patent/JPS6482719A/en
Publication of JPS6482719A publication Critical patent/JPS6482719A/en
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To reduce the size and cost of the multiple converter of doubled constitution by monitoring respective constitution parts of the multiple converter by utilizing the code converting function that the stand-by system of the multiple converter has. CONSTITUTION:A path A(B) is set and the high-order group signal output of an in-use multiple converter SYS is inputted to the stand-by multiple converter SBY. Then the output signals of bipolar/unipolar code converting circuits 11-1n(71-7n) and respective input signals corresponding to unipolar/bipolar code converting circuits 7'1-7'n are compared with each other by a testing circuit 9. Paths C1-Cn are set so as to monitor the operation states of the unipolar/bipolar code converting circuits 71-7n. Then the testing circuit 9 compared the input signals of the unipolar/bipolar code converting circuits 71-7n with the output signals of the bipolar/unipolar code converting circuits 1'1-1'n. Consequently, all constituent circuits of the multiplexer SYS can be monitored.
JP23871287A 1987-09-25 1987-09-25 Monitoring system for multiple converter Pending JPS6482719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23871287A JPS6482719A (en) 1987-09-25 1987-09-25 Monitoring system for multiple converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23871287A JPS6482719A (en) 1987-09-25 1987-09-25 Monitoring system for multiple converter

Publications (1)

Publication Number Publication Date
JPS6482719A true JPS6482719A (en) 1989-03-28

Family

ID=17034149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23871287A Pending JPS6482719A (en) 1987-09-25 1987-09-25 Monitoring system for multiple converter

Country Status (1)

Country Link
JP (1) JPS6482719A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04229737A (en) * 1990-06-18 1992-08-19 Nec Corp Monitor system for active circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04229737A (en) * 1990-06-18 1992-08-19 Nec Corp Monitor system for active circuit

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