JPS6482645A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6482645A
JPS6482645A JP62241712A JP24171287A JPS6482645A JP S6482645 A JPS6482645 A JP S6482645A JP 62241712 A JP62241712 A JP 62241712A JP 24171287 A JP24171287 A JP 24171287A JP S6482645 A JPS6482645 A JP S6482645A
Authority
JP
Japan
Prior art keywords
film
line
package
chip
reference potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62241712A
Other languages
Japanese (ja)
Inventor
Akinori Tawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62241712A priority Critical patent/JPS6482645A/en
Publication of JPS6482645A publication Critical patent/JPS6482645A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To connect the leads of a package to an IC chip by preferable impedance matching by providing specific signal lines on the main face of an insulating film, and providing a conductive film connected to a reference potential on the other face. CONSTITUTION:Wirings instead of bonding wirings are formed of an insulating film 7, signal lines 8, a conductive film 9. The characteristic impedance of the line can be obtained from the thickness H of the film, its dielectric constant and the width W of the line. A reference potential line 10 is connected to the film 9 by providing a through hole 71 in the film 7. The lines 8, 10, a signal line lead 31 and a reference potential lead 32 are connected to the electrode pads 11 of an IC chip 1 in a package 2, and a terminating resistor 6 is provided. This semiconductor device can be impedance matched between the leads of the package and the chip, and the transmission loss of a high speed signal can be reduced.
JP62241712A 1987-09-25 1987-09-25 Semiconductor device Pending JPS6482645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62241712A JPS6482645A (en) 1987-09-25 1987-09-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62241712A JPS6482645A (en) 1987-09-25 1987-09-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6482645A true JPS6482645A (en) 1989-03-28

Family

ID=17078411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62241712A Pending JPS6482645A (en) 1987-09-25 1987-09-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6482645A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05283487A (en) * 1992-04-03 1993-10-29 Mitsubishi Electric Corp Wiring for high-frequency signal and bonding device therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05283487A (en) * 1992-04-03 1993-10-29 Mitsubishi Electric Corp Wiring for high-frequency signal and bonding device therefor

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