JPS6482537A - Sub-mount for optical semiconductor element - Google Patents

Sub-mount for optical semiconductor element

Info

Publication number
JPS6482537A
JPS6482537A JP24181287A JP24181287A JPS6482537A JP S6482537 A JPS6482537 A JP S6482537A JP 24181287 A JP24181287 A JP 24181287A JP 24181287 A JP24181287 A JP 24181287A JP S6482537 A JPS6482537 A JP S6482537A
Authority
JP
Japan
Prior art keywords
bonding
posts
lead
optical semiconductor
infrared detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24181287A
Other languages
Japanese (ja)
Other versions
JP2503532B2 (en
Inventor
Yasuaki Yoshida
Yoshiharu Komine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62241812A priority Critical patent/JP2503532B2/en
Publication of JPS6482537A publication Critical patent/JPS6482537A/en
Application granted granted Critical
Publication of JP2503532B2 publication Critical patent/JP2503532B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To enable die bonding, using lead-posts as targets for alignment, and to prevent coating with a bonding wire of the light-receiving surface of an optical semiconductor element by oppositely arranging the lead-posts to each bonding-pad for the optical semiconductor element. CONSTITUTION:The mounting positions of lead-posts 2 are changed, the positions of the four corners of die bonding are determined by an infrared detecting element 5, and die bonding is enabled, employing the lead-posts 2 as targets, thus improving the accuracy of die bonding. When the infrared detecting element 5 is die-bonded, bonding-pads 6 for the infrared detecting element 5 and the lead-posts 2 are faced oppositely, thus preventing the coating of the light- receiving surface of the infrared detecting element 5 with bonding-wires 7 even when the bonding-wires 7 are stretched linearly.
JP62241812A 1987-09-24 1987-09-24 Submount for optical semiconductor device Expired - Lifetime JP2503532B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62241812A JP2503532B2 (en) 1987-09-24 1987-09-24 Submount for optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62241812A JP2503532B2 (en) 1987-09-24 1987-09-24 Submount for optical semiconductor device

Publications (2)

Publication Number Publication Date
JPS6482537A true JPS6482537A (en) 1989-03-28
JP2503532B2 JP2503532B2 (en) 1996-06-05

Family

ID=17079867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62241812A Expired - Lifetime JP2503532B2 (en) 1987-09-24 1987-09-24 Submount for optical semiconductor device

Country Status (1)

Country Link
JP (1) JP2503532B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61234588A (en) * 1985-04-11 1986-10-18 Mitsubishi Electric Corp Submount for optical semiconductor element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61234588A (en) * 1985-04-11 1986-10-18 Mitsubishi Electric Corp Submount for optical semiconductor element

Also Published As

Publication number Publication date
JP2503532B2 (en) 1996-06-05

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