JPS6479994A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To suppress the increase of the number of dummy word wires by making a pair of bit wires intersect in the dynamic type semiconductor memory device of a memory cell in a matrix arrangement, providing a dynamic cell at one bit wire and making the dummy word wire rise or fall from an intermediate potential. CONSTITUTION:Pairs of bit wires a BL0 and an anti BL0, a BL1 and an anti BL1... respectively connecting with a sense amplifier, alternately intersect with blocks (b) and (d), (a) and (c), etc., make capacity combining noises received from the adjoining bit pairs identical and the decrease of a voltage difference does not exist at the time of reading. On the other hand, dummy cells connected with respective dummy word wires DWL0, DWL1 are provided at one of the pairs of the bit wires the BL0 anti BL1, BL2... at every pair of bit wires, and respective dynamic cells are risen from the intermediate potential at the word wire DWL0 fallen at the word wire DWL1, and the potential change of the bit wire generated at the rise of the word wire can be prevented. Consequently, only the two dynamic word wires are used, and the increase of the number of the wires and the enlargement of the occupying area can be suppressed.