JPS533747A - Self-refresh dynamic memory circuit - Google Patents

Self-refresh dynamic memory circuit

Info

Publication number
JPS533747A
JPS533747A JP7856076A JP7856076A JPS533747A JP S533747 A JPS533747 A JP S533747A JP 7856076 A JP7856076 A JP 7856076A JP 7856076 A JP7856076 A JP 7856076A JP S533747 A JPS533747 A JP S533747A
Authority
JP
Japan
Prior art keywords
self
memory circuit
dynamic memory
refresh dynamic
capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7856076A
Other languages
Japanese (ja)
Inventor
Kenji Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7856076A priority Critical patent/JPS533747A/en
Publication of JPS533747A publication Critical patent/JPS533747A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:A boostrap capacity and a holding capacity are connected in series in the memory circuit which has a capability of self-refreshment, thereby preventing the potential at a middle point from varying even if the cahrge in the bootstrap capacity flows out in reading.
JP7856076A 1976-07-01 1976-07-01 Self-refresh dynamic memory circuit Pending JPS533747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7856076A JPS533747A (en) 1976-07-01 1976-07-01 Self-refresh dynamic memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7856076A JPS533747A (en) 1976-07-01 1976-07-01 Self-refresh dynamic memory circuit

Publications (1)

Publication Number Publication Date
JPS533747A true JPS533747A (en) 1978-01-13

Family

ID=13665277

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7856076A Pending JPS533747A (en) 1976-07-01 1976-07-01 Self-refresh dynamic memory circuit

Country Status (1)

Country Link
JP (1) JPS533747A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5665760U (en) * 1979-10-25 1981-06-02
JPS57192693A (en) * 1981-05-01 1982-11-26 Nl Industries Inc Well head connector with check valve
US4814647A (en) * 1987-04-06 1989-03-21 Texas Instruments Incorporated Fast rise time booting circuit
US4823317A (en) * 1988-01-20 1989-04-18 Ict International Cmos Technolgy, Inc. EEPROM programming switch
JPH01143492U (en) * 1988-03-28 1989-10-02
JPH0351298U (en) * 1989-09-26 1991-05-17
US5261638A (en) * 1992-03-10 1993-11-16 Cejn Ab Pipe connection device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5665760U (en) * 1979-10-25 1981-06-02
JPS57192693A (en) * 1981-05-01 1982-11-26 Nl Industries Inc Well head connector with check valve
US4814647A (en) * 1987-04-06 1989-03-21 Texas Instruments Incorporated Fast rise time booting circuit
US4823317A (en) * 1988-01-20 1989-04-18 Ict International Cmos Technolgy, Inc. EEPROM programming switch
JPH01143492U (en) * 1988-03-28 1989-10-02
JPH0351298U (en) * 1989-09-26 1991-05-17
US5261638A (en) * 1992-03-10 1993-11-16 Cejn Ab Pipe connection device

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