JPS647538A - Manufacture of wiring structure of lsi - Google Patents

Manufacture of wiring structure of lsi

Info

Publication number
JPS647538A
JPS647538A JP62161073A JP16107387A JPS647538A JP S647538 A JPS647538 A JP S647538A JP 62161073 A JP62161073 A JP 62161073A JP 16107387 A JP16107387 A JP 16107387A JP S647538 A JPS647538 A JP S647538A
Authority
JP
Japan
Prior art keywords
wiring
case
wiring material
formation
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62161073A
Other languages
Japanese (ja)
Inventor
Hiroshi Tetsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62161073A priority Critical patent/JPS647538A/en
Publication of JPS647538A publication Critical patent/JPS647538A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To make possible the more microscopical formation of the wiring structure of an LSI by a method wherein a recessed part is provided in a base insulating film before wiring are formed and a wiring material having a directional property is deposited at the time of formation of the wiring material to perform a patterning of the wiring. CONSTITUTION:In the case of the formation of a memory array part and so on, part of an intermediate insulating film 302 is removed using a photolitho etching technique to obtain a recessed part 303. At this time, it is better to form the etching shape at an acute angle (an overhang shape). Then, when a wiring material is formed using a deposition unit having a directional property, wirings 303 and 305 are formed. In this case, in case the step formed on the film 302 is small and in case the pitch between the wiring is large, the wiring material is formed thinly on a step sidewall part 306, but the isolation between the wiring can be completely executed at this time by removing the thin part of the wiring material using a wet etching method. Thereby, very closely adjacent wiring can be formed without any intervals between the wiring.
JP62161073A 1987-06-30 1987-06-30 Manufacture of wiring structure of lsi Pending JPS647538A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62161073A JPS647538A (en) 1987-06-30 1987-06-30 Manufacture of wiring structure of lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62161073A JPS647538A (en) 1987-06-30 1987-06-30 Manufacture of wiring structure of lsi

Publications (1)

Publication Number Publication Date
JPS647538A true JPS647538A (en) 1989-01-11

Family

ID=15728110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62161073A Pending JPS647538A (en) 1987-06-30 1987-06-30 Manufacture of wiring structure of lsi

Country Status (1)

Country Link
JP (1) JPS647538A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100281897B1 (en) * 1998-07-21 2001-03-02 윤종용 Semiconductor device having conduction layer and fabrication method thereof
JP2012209441A (en) * 2011-03-30 2012-10-25 Oki Electric Ind Co Ltd High density wiring structure and manufacturing method of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100281897B1 (en) * 1998-07-21 2001-03-02 윤종용 Semiconductor device having conduction layer and fabrication method thereof
JP2012209441A (en) * 2011-03-30 2012-10-25 Oki Electric Ind Co Ltd High density wiring structure and manufacturing method of the same

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