JPS6474765A - Hetero-junction fet - Google Patents
Hetero-junction fetInfo
- Publication number
- JPS6474765A JPS6474765A JP23304187A JP23304187A JPS6474765A JP S6474765 A JPS6474765 A JP S6474765A JP 23304187 A JP23304187 A JP 23304187A JP 23304187 A JP23304187 A JP 23304187A JP S6474765 A JPS6474765 A JP S6474765A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- inalas
- doped
- gate electrode
- schottky
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 2
- 238000010438 heat treatment Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 230000003449 preventive effect Effects 0.000 abstract 2
- 230000005533 two-dimensional electron gas Effects 0.000 abstract 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 abstract 1
- 230000006866 deterioration Effects 0.000 abstract 1
- 230000000415 inactivating effect Effects 0.000 abstract 1
- 125000006850 spacer group Chemical group 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To prevent the deterioration of Schottky characteristics due to heating at the time of a process and heating in subsequent processes by using Si-doped InAlAs as a two-dimensional electron gas supply layer and Al as a gate electrode and inserting a GaAs layer between the two-dimensional electron gas supply layer and the gate electrode. CONSTITUTION:Undoped InAlAs as a buffer layer 2, undoped InGaAs as a channel layer 3, undoped InAlAs as a spacer 4, and Si-doped N-InAlAs as an electron supply layer 5 are grown onto an InP substrate 1. Si-doped N-GaAs is grown onto the electron supply layer 5 as a diffusion preventive layer 6. Al is vacuum-deposited onto the layer 6, and a gate electrode is formed. Lastly, a source electrode 8 and a drain electrode 9 are shaped, and a surface inactivating film 10 is attached. An FET with a Schottky junction having the constitution displays excellent Schottky characteristics better than FETs with Schottky junctions having conventional structure in which no diffusion preventive layer 6 is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23304187A JPH088352B2 (en) | 1987-09-17 | 1987-09-17 | Heterojunction FET |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23304187A JPH088352B2 (en) | 1987-09-17 | 1987-09-17 | Heterojunction FET |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6474765A true JPS6474765A (en) | 1989-03-20 |
JPH088352B2 JPH088352B2 (en) | 1996-01-29 |
Family
ID=16948874
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23304187A Expired - Fee Related JPH088352B2 (en) | 1987-09-17 | 1987-09-17 | Heterojunction FET |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH088352B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02254731A (en) * | 1989-03-28 | 1990-10-15 | Matsushita Electric Ind Co Ltd | Hetero-junction type field effect transistor |
US5055891A (en) * | 1990-05-31 | 1991-10-08 | Hewlett-Packard Company | Heterostructure transistor using real-space electron transfer |
JPH04226041A (en) * | 1990-04-11 | 1992-08-14 | Hughes Aircraft Co | Hemt strucutre provided with passivation donor layer |
US5319223A (en) * | 1991-07-26 | 1994-06-07 | Kabushiki Kaisha Toshiba | High electron mobility transistor |
US5488237A (en) * | 1992-02-14 | 1996-01-30 | Sumitomo Electric Industries, Ltd. | Semiconductor device with delta-doped layer in channel region |
JP2001044417A (en) * | 1999-07-26 | 2001-02-16 | Fujitsu Ltd | Semiconductor device |
-
1987
- 1987-09-17 JP JP23304187A patent/JPH088352B2/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02254731A (en) * | 1989-03-28 | 1990-10-15 | Matsushita Electric Ind Co Ltd | Hetero-junction type field effect transistor |
JPH04226041A (en) * | 1990-04-11 | 1992-08-14 | Hughes Aircraft Co | Hemt strucutre provided with passivation donor layer |
US5055891A (en) * | 1990-05-31 | 1991-10-08 | Hewlett-Packard Company | Heterostructure transistor using real-space electron transfer |
US5319223A (en) * | 1991-07-26 | 1994-06-07 | Kabushiki Kaisha Toshiba | High electron mobility transistor |
US5488237A (en) * | 1992-02-14 | 1996-01-30 | Sumitomo Electric Industries, Ltd. | Semiconductor device with delta-doped layer in channel region |
JP2001044417A (en) * | 1999-07-26 | 2001-02-16 | Fujitsu Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH088352B2 (en) | 1996-01-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |