JPS6474641A - Memory access control system - Google Patents
Memory access control systemInfo
- Publication number
- JPS6474641A JPS6474641A JP23182787A JP23182787A JPS6474641A JP S6474641 A JPS6474641 A JP S6474641A JP 23182787 A JP23182787 A JP 23182787A JP 23182787 A JP23182787 A JP 23182787A JP S6474641 A JPS6474641 A JP S6474641A
- Authority
- JP
- Japan
- Prior art keywords
- write
- request
- data
- msu
- mark
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To write data plural times with one write request by using the request and byte mark from a CPU by a storage controller to write the same data in a storage device an indicating number of times. CONSTITUTION:When an access request 1 is the write request, a port control circuit 6 generates and sends data which writes only a part of write data 3, which is designated by a byte mark 2, in a storage device MSU. If the request 1 is the write request to write the same data plural times, the circuit 6 increments an address register 5 a number of times indicated by the mark 2 to successively write data 3 in the MSU. In case of the write request, the circuit 6 sends the designated address to the MSU and performs the control to write data 3 only in the byte position designated by the mark 2. Thus, the same data is written in the MSU plural times by one write request.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23182787A JPS6474641A (en) | 1987-09-16 | 1987-09-16 | Memory access control system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23182787A JPS6474641A (en) | 1987-09-16 | 1987-09-16 | Memory access control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6474641A true JPS6474641A (en) | 1989-03-20 |
Family
ID=16929640
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23182787A Pending JPS6474641A (en) | 1987-09-16 | 1987-09-16 | Memory access control system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6474641A (en) |
-
1987
- 1987-09-16 JP JP23182787A patent/JPS6474641A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5725069A (en) | Vector data processing equipment | |
| DE69430599D1 (en) | Dynamically expandable storage unit matrix system | |
| JPS5779557A (en) | Data processor | |
| JPS51141537A (en) | Memory access control device | |
| ATE55528T1 (en) | VIDEO SIGNAL PROCESSING CIRCUITS. | |
| DK462888A (en) | DATA TRANSFER CIRCUIT | |
| JPS6474641A (en) | Memory access control system | |
| JPS57117055A (en) | Memory extension system of microcomputer | |
| JPS576951A (en) | Error logging system | |
| JPS57117056A (en) | Microcomputer device | |
| JPS5786968A (en) | Doubled computer system | |
| JPS5533282A (en) | Buffer control system | |
| JPS56129947A (en) | Microprogram controller | |
| JPS6423354A (en) | Duplex buffer memory control system | |
| JPS5578365A (en) | Memory control unit | |
| JPS5740790A (en) | Storage control system | |
| JPS6419457A (en) | Memory device | |
| EP0284100A3 (en) | Information processor having instruction prefetch function | |
| JPS5578324A (en) | Direct memory access system | |
| JPS56137440A (en) | Program computer | |
| JPS5643896A (en) | Key telephone control circuit | |
| JPS5757369A (en) | Access control system | |
| JPS57114926A (en) | Terminal control system | |
| JPS5549764A (en) | Memory control system | |
| JPS56159896A (en) | Data processing system |