JPS647374A - Pcm device - Google Patents
Pcm deviceInfo
- Publication number
- JPS647374A JPS647374A JP16084087A JP16084087A JPS647374A JP S647374 A JPS647374 A JP S647374A JP 16084087 A JP16084087 A JP 16084087A JP 16084087 A JP16084087 A JP 16084087A JP S647374 A JPS647374 A JP S647374A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- clock
- signal
- period
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE:To eliminate the need for the control for generating forcibly a memory clear period externally through the use of a microcomputer or the like by writing 0s to a memory area of a readout signal just after the recording signal is read out of the memory. CONSTITUTION:When a block clock 4a is outputted from a recording clock generating circuit 618A, an address control circuit 605 updates addresses 5d, 5c. Then an R/W clock generating circuit 5 receives a readout symbol clock 4c to generate a latch clock 5a and a selection signal 5b of a selector 3. The data in the memory 1 designated by the addresses 5d, 5c by using the clock 5a is latched by a latch 2 and recorded on a tape. On the other hand, an input A of the selector 3 is selected for the 0 period by the signal 5b and 0s are inputted to the memory 1. A clock 5e is applied to the memory 1 from the circuit 5 in the same timing as the 0 period of the signal 5b resulting that the memory slot read out already is 0. The same operation is repeated successively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16084087A JPH083941B2 (en) | 1987-06-30 | 1987-06-30 | PCM device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16084087A JPH083941B2 (en) | 1987-06-30 | 1987-06-30 | PCM device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS647374A true JPS647374A (en) | 1989-01-11 |
JPH083941B2 JPH083941B2 (en) | 1996-01-17 |
Family
ID=15723544
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16084087A Expired - Lifetime JPH083941B2 (en) | 1987-06-30 | 1987-06-30 | PCM device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH083941B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0449212A2 (en) * | 1990-03-27 | 1991-10-02 | Sanyo Electric Co., Ltd. | Signal processing circuit of digital audio tape recorder |
-
1987
- 1987-06-30 JP JP16084087A patent/JPH083941B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0449212A2 (en) * | 1990-03-27 | 1991-10-02 | Sanyo Electric Co., Ltd. | Signal processing circuit of digital audio tape recorder |
Also Published As
Publication number | Publication date |
---|---|
JPH083941B2 (en) | 1996-01-17 |
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