JPS647372U - - Google Patents
Info
- Publication number
- JPS647372U JPS647372U JP9984887U JP9984887U JPS647372U JP S647372 U JPS647372 U JP S647372U JP 9984887 U JP9984887 U JP 9984887U JP 9984887 U JP9984887 U JP 9984887U JP S647372 U JPS647372 U JP S647372U
- Authority
- JP
- Japan
- Prior art keywords
- modulation signal
- conversion circuit
- address
- converts
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 1
Description
第１図は本考案回路の一実施例のブロツク図、
第２図は本考案回路で伝送に用いる情報信号を説
明するための図、第３図は本考案回路を適用した
メモリカードの一実施例のブロツク図、第４図は
従来のメモリカードの一例のブロツク図、第５図
は従来のシリアル通信の情報信号を説明するため
の図である。
２２……イニシヤルフレーム検出器、２３……
タイミング発生器、２４……リフオーマツタ、２
８……シリアル／パラレル変換器、２９……アド
レスカウンタ、３０，３３……データレジスタ、
３４……パラレル／シリアル変換器、３５……フ
オーマツタ、３６……スタートビツト発生器、４
１……インターフエース回路、４２……メモリ。
FIG. 1 is a block diagram of an embodiment of the circuit of the present invention.
Figure 2 is a diagram for explaining information signals used for transmission by the circuit of the present invention, Figure 3 is a block diagram of an embodiment of a memory card to which the circuit of the present invention is applied, and Figure 4 is an example of a conventional memory card. The block diagram of FIG. 5 is a diagram for explaining information signals of conventional serial communication. 22...Initial frame detector, 23...
Timing generator, 24...Ref-o-matsuta, 2
8... Serial/parallel converter, 29... Address counter, 30, 33... Data register,
34...Parallel/serial converter, 35...Formatter, 36...Start bit generator, 4
1...Interface circuit, 42...Memory.
Claims (1)
ＲＺ変調された信号の後に、所定バイト数のアド
レス又はアドレス及びデータのデータフレームが
ビツト中央で反転するようＮＲＺ変調とは異なる
第２の変調された信号が連続するシリアルの情報
信号を供給されて、該データフレームの第２の変
調信号をＮＲＺ変調信号に変換する第１の変換回
路と、 該第１の変換回路の出力するＮＲＺ変調信号を
パラレルのアドレス又はアドレス及び所定ビツト
単位のデータに変換して出力する第２の変換回路
と、 該所定ビツト単位のデータを供給されて、該デ
ータを所定バイト数のデータフレームのＮＲＺ変
調された信号に変換する第３の変換回路と、 該第３の変換回路の出力するＮＲＺ変調信号を
該第２の変調信号に変換し、その前に該イニシヤ
ルフレームのＮＲＺ変調信号を付加してシリアル
に出力する第４の変換回路とよりなるインターフ
エース回路。[Scope of claim for utility model registration] The initial frame for synchronization is N for each block.
After the RZ modulated signal, a second modulated signal different from NRZ modulation is supplied with a continuous serial information signal such that the address of a predetermined number of bytes or the data frame of address and data is inverted at the center of the bit. , a first conversion circuit that converts a second modulation signal of the data frame into an NRZ modulation signal, and converts the NRZ modulation signal output from the first conversion circuit into a parallel address or an address and data in a predetermined bit unit. a second conversion circuit that outputs a data frame of a predetermined number of bytes; an interface circuit comprising a fourth conversion circuit that converts the NRZ modulation signal output from the conversion circuit into the second modulation signal, adds the NRZ modulation signal of the initial frame to the second modulation signal, and outputs the resultant serially; .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987099848U JPH067385Y2 (en) | 1987-06-29 | 1987-06-29 | Interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987099848U JPH067385Y2 (en) | 1987-06-29 | 1987-06-29 | Interface circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS647372U true JPS647372U (en) | 1989-01-17 |
| JPH067385Y2 JPH067385Y2 (en) | 1994-02-23 |
Family
ID=31327388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987099848U Expired - Lifetime JPH067385Y2 (en) | 1987-06-29 | 1987-06-29 | Interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH067385Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5263655A (en) * | 1975-11-20 | 1977-05-26 | Canon Inc | Data converting device |
-
1987
- 1987-06-29 JP JP1987099848U patent/JPH067385Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5263655A (en) * | 1975-11-20 | 1977-05-26 | Canon Inc | Data converting device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH067385Y2 (en) | 1994-02-23 |
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