JPS6468873A - System control system - Google Patents

System control system

Info

Publication number
JPS6468873A
JPS6468873A JP22610987A JP22610987A JPS6468873A JP S6468873 A JPS6468873 A JP S6468873A JP 22610987 A JP22610987 A JP 22610987A JP 22610987 A JP22610987 A JP 22610987A JP S6468873 A JPS6468873 A JP S6468873A
Authority
JP
Japan
Prior art keywords
control
shared memories
shared
system controller
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22610987A
Other languages
Japanese (ja)
Inventor
Tadao Kondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22610987A priority Critical patent/JPS6468873A/en
Publication of JPS6468873A publication Critical patent/JPS6468873A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE:To increase inter-system communication speed in a loose coupling multiprocessor system by accessing a shared memory under the control of a system controller of a first or second information processing system to read out data written by the access to the shared memory. CONSTITUTION:Shared memories 7 and 8 are accessed by the control of a system controller 1b of a system B to read out data written in shared memories 7 and 8 by the access to shared memories 7 and 8 under the control of a system controller 1a of a system A. Shared memories 7 and 8 are accessed by the control of the system controller 1a of the system A to read out data written in shared memories 7 and 8 by the access to shared memories 7 and 8 under the control of the system controller 1b of the system B. Thus, the inter-system communication speed in the loose coupling multiprocessor system is increased.
JP22610987A 1987-09-09 1987-09-09 System control system Pending JPS6468873A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22610987A JPS6468873A (en) 1987-09-09 1987-09-09 System control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22610987A JPS6468873A (en) 1987-09-09 1987-09-09 System control system

Publications (1)

Publication Number Publication Date
JPS6468873A true JPS6468873A (en) 1989-03-14

Family

ID=16839974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22610987A Pending JPS6468873A (en) 1987-09-09 1987-09-09 System control system

Country Status (1)

Country Link
JP (1) JPS6468873A (en)

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