JPS6464199A - Semiconductor memory circuit - Google Patents
Semiconductor memory circuitInfo
- Publication number
- JPS6464199A JPS6464199A JP62221505A JP22150587A JPS6464199A JP S6464199 A JPS6464199 A JP S6464199A JP 62221505 A JP62221505 A JP 62221505A JP 22150587 A JP22150587 A JP 22150587A JP S6464199 A JPS6464199 A JP S6464199A
- Authority
- JP
- Japan
- Prior art keywords
- register
- clock
- sub
- time
- tester
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62221505A JPS6464199A (en) | 1987-09-03 | 1987-09-03 | Semiconductor memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62221505A JPS6464199A (en) | 1987-09-03 | 1987-09-03 | Semiconductor memory circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6464199A true JPS6464199A (en) | 1989-03-10 |
Family
ID=16767761
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62221505A Pending JPS6464199A (en) | 1987-09-03 | 1987-09-03 | Semiconductor memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6464199A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05128015A (ja) * | 1991-11-06 | 1993-05-25 | Fujitsu Ltd | デイレイ試験方法 |
WO2005008677A1 (ja) * | 2003-07-22 | 2005-01-27 | Fujitsu Limited | 内蔵されるメモリマクロのac特性を測定するテスト回路を有する集積回路装置 |
-
1987
- 1987-09-03 JP JP62221505A patent/JPS6464199A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05128015A (ja) * | 1991-11-06 | 1993-05-25 | Fujitsu Ltd | デイレイ試験方法 |
WO2005008677A1 (ja) * | 2003-07-22 | 2005-01-27 | Fujitsu Limited | 内蔵されるメモリマクロのac特性を測定するテスト回路を有する集積回路装置 |
US7421364B2 (en) | 2003-07-22 | 2008-09-02 | Fujitsu Limited | Integrated circuit device having a test circuit to measure AC characteristics of internal memory macro |
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