JPS646411B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a failure diagnosis device for electric circuits, and more particularly, to a failure diagnosis device for electric circuits, and more specifically, a device for diagnosing failures in electric circuits, and more specifically, for detecting elements such as various sensors and limit switches included in electric control panels containing electric control circuits of machine tools, etc. The present invention relates to a failure or deterioration diagnostic device.

Conventionally, for example, maintenance of electrical control panels for machine tools, special-purpose machines, and transfer machines (hereinafter referred to as machine tools, etc.) was carried out by the technical skills of maintenance personnel, which caused accidents that only occurred several times a day. It was difficult to take appropriate diagnosis and countermeasures against such failures. Furthermore, predictive maintenance for failures of sensors, limit switches, etc., which account for 50% of failures, is currently almost impossible.

The present invention was made in view of such circumstances,
Elements included in electrical control circuits of machine tools, etc.
For example, it not only clearly displays the cause of a failure in a relay contact to make its maintenance more efficient, but also detects and displays deterioration of the element, making predictive maintenance possible.

In the present invention, the voltage of many sensors, limit switches, etc., elements such as relay contacts in an electrical control circuit of a machine tool, etc. is input, and the state of this input signal is automatically memorized according to the operation step of the machine, and the memorized state is automatically memorized according to the operating steps of the machine. Compare the data that was input with the data that will be input later, find out the operating status of sensors, limit switches, etc. related to each element, judge whether it is good or bad, and if necessary, mark it as an abnormality if there is a discrepancy, and set the number of the abnormal element. etc. are displayed.

In addition, an electric signal, such as a voltage, is detected when the above element is turned on or off, and this detected electric signal is compared with an arbitrarily variable set value, such as a reference voltage, to predict whether it is good, bad, or deteriorated before a failure occurs. It is something. Therefore, the present invention is capable of diagnosing the quality or deterioration of not only the relay contacts but also capacitors, coils, and other elements.

An embodiment of the present invention will be described in detail below with reference to the drawings.

In Fig. 1, E is an electric control circuit of a machine tool to be diagnosed, e ₀ , e _{1 . 0} , _V1
...V _o-2 is input to the device of the present invention via an electric wire.

1 is a pulse oscillator that outputs a clock pulse CK for synchronizing the entire circuit, and is actually used by lowering the frequency using a frequency dividing circuit.

2 is an inverter circuit which inverts the clock pulse CK and outputs a pulse whose rise time is delayed by 180 degrees.

3 counts each rise of the clock pulse CK output from the pulse oscillator 1 and generates multiple address signals A ₀ to _{A o-2} , counts n _-1 ,
This is an address counter that outputs timing pulses n _-1 and n at n, respectively.

4 is the voltage of the elements e ₀ , e ₁ . . . e _n of the electrical control circuit E that changes with the operation steps of the mechanical device.
Compare V ₀ to _{V o-2} with an internally set arbitrarily variable reference value, such as a reference voltage level, and then
This is a comparison circuit that outputs D ₀ to D _o-2 .

5 inputs the data terminals of the digital signals D ₀ to D _o-2 outputted from the comparison circuit 4 to X ₀ to _{X o-2} ;
A data selector that sequentially selects these signals one by one according to the address signals A ₀ to A _o-2 of the address counter 3, and selects the terminals X ₀ to X ₀ selected by the address signals A 0 to _{A o-2} . The input level to _o-2 is
The input signal A is transmitted to a terminal Z, and an input signal A to a storage circuit 6, etc., which will be described later, is output from the terminal Z.

Reference numeral 6 indicates an input terminal F for receiving address signals A ₀ to A _o-2 from the address counter 3, and an output terminal F for receiving address signals A 0 to A o-2 from the address counter 3, and outputs of a step counter 13, ie, step signals S ₀ to S _o, which will be described later.
A storage circuit having an input terminal G that receives address signals A ₀ to A _o-2 corresponding to the number of each element of the electric circuit.
The storage circuit has a storage capacity of a number of bits corresponding to the multiplier value of the number of step signals _S0 to _S0 corresponding to the number of steps of the machine tool, etc. Terminal W _1N
When the terminal receives a “1” signal, the input level of the terminal _D1N is changed to the address signal _A0 ~ _Ao-2 and the step signal _S0 ~
Write (memorize) the location specified by S _o and
When a “0” signal is input to the terminal W _1N , the memory level written to the specified location is transferred to the terminal D _put
It is output (read) as an input signal B to an OR circuit 7, which will be described later.

7 is two input signals A and B to two input terminals
If they are the same, the output signal X becomes a “0” signal,
If input signals A and B do not match, the output signal
It becomes 1.

Reference numeral 8 denotes a temporary memory circuit having two stages of flip-flops 8a and 8b, the front and rear flip-flops 8a and 8b.
is the address signal A ₀ ~ as shown in FIG.
If a signal of A≠B and X=1 is input from the exclusive OR circuit 7 to the _S1 terminal while A _o-2 is being generated, a “1” signal (symbol M in Fig. 2) is generated. remember,
Address counter 3 timing pulse signal n _-1
When input to the input terminal C of the flip-flop 8b in the subsequent stage, the flip-flop 8b in the latter stage is operated, and a "1" signal (reference numeral N in FIG. ₂ ) is output and held at its output terminal Q2. The memory of the flip-flop 8a in the previous stage is reset by inputting the timing pulse signal n, which is delayed by one pulse from the pulse signal n _- 1, to its input terminal R. The output of _the terminal _Q2 is a " ₁ " signal (symbol N in _FIG. ), and when the “0” signal is output continuously, the terminal Q ₂ is output at the rising edge of the pulse signal n _-1 .
The output becomes a "0" signal (due to the fall indicated by the symbol P in FIG. 2).

9 is the write-diagnosis operation selector switch and contact _K1
When it switches to the contact K2 side, it becomes a write operation, and when it switches to the contact _K2 side, it becomes a diagnostic operation.

Reference numeral 10 denotes an AND circuit which becomes effective during the write operation of the changeover switch 9, and is connected to the terminal of the temporary storage circuit 8.
When the output of Q ₂ is a "1" signal, when the "1" signal and pulse signal applied through the contact K ₁ of the changeover switch 9 are input, the memory circuit 6
This outputs a write command pulse to terminal W _1N of .

11 is an OR circuit, and switch 9 is the contact point _K1
When the output of the terminal Q ₂ of the temporary memory circuit 8 is input as a “1” signal, or when the switch 9 is on the contact K ₂ side, the output of the terminal Q ₂ of the temporary memory circuit 8 is input as a “1” signal. This is inverted by the inverter 14 when it is a "0" signal, and when it is input as a "1" signal, it outputs a step signal SH, which is sent to the switch 12.
Counter 1 through the contact point _C2 of
It is sent to terminal H of No.3.

12 is the operation/stop switch of this device, and the contact
When on the C ₁ side (stop side), the lower contact C ₁ in the diagram
A reset circuit signal RE is applied to the terminal R of the step counter 13, which will be described later, through the step counter ₁₃ , and the select signal of the step counter 13 is returned to _S0 . This is to send the advance signal SH to the terminal H of the step counter 13.

13 is a step counter, and the switch 12
By inputting the step signal SH applied through the contact point _C2 , step signals _S0 to _S0 are inputted to the input terminal G of the memory circuit 6 each time, and the step at the time of writing or reading is specified. .

14 is an operation changeover switch 9 which is a contact point for diagnostic operation.
_K2 side, the terminal of the temporary memory circuit 8
OR circuit 11 when the output of Q ₂ is at “0” signal
This is an inverter circuit for inverting the navel "0" signal to a "1" signal and supplying the inverted signal.

15 operates by inputting that signal to the terminal _T1 only when the output of the terminal _Q2 of the temporary memory circuit 8 is a "1" signal when the switch of the operation changeover switch 9 is on the contact _K2 side for diagnostic operation. A timer circuit generates an alarm signal after a preset time has elapsed.
This outputs T _OUT from terminal T ₂ .

16 is the address of the abnormality point when this device detects an abnormality, that is, when the above-mentioned alarm signal T _OUT is input;
Step (process, etc.) number, abnormality status (H _pr L)
This is a display circuit that displays the following information.

Next, the operation of the above device will be explained in the following three stages.

(1) First, the normal operation of the electrical control circuit E to be diagnosed is stored in the device of the present invention.

At this time, the write-diagnostic operation changeover switch 9 is connected to the write operation contact _K1 .
Then, the changeover switch 12 is once connected to the contact _C1 and then connected to the contact _C2 side. once the contact
Since it is connected to _C1 , the step signal _S0 is inputted from the step counter 13 to the memory circuit by the reset signal RE.

As the machine tool, etc. operates, the voltages V ₀ , V ₁ , ...V _o-2 appearing at the elements e ₀ , e _{1 , e 2 ,} ... e _n of the electric control circuit E are constantly supplied to the comparator circuit 4. There, it is compared with a set reference level, and the result is converted to a digital level to generate a digital signal.
D ₀ to _{D o-2} , and the terminal X ₀ of data selector 5
~X _o-2 is always input. On the other hand, in response to the pulse CK sent from the pulse oscillator 1, the address counter 3 repeatedly issues address signals A ₀ to _{A o-2} and pulse signals n _-1 and n unrelated to address selection, among which the address signal A ₀ . . . A _o-2 is sent to the data selector 5 and the memory circuit 6, and the address signal is sent from the terminal Z of the data selector 5.
Terminals X ₀ ~ X _o-2 as specified by A ₀ ~ _{A o-2}
The digital signals D ₀ to D _o-2 inputted to are sequentially inputted one by one to the terminal D _1N of the memory circuit 6, and at the same time are inputted to one input terminal of the exclusive OR circuit 7 as the input signal A. .

Note that the addresses A ₀ to _{A o-2} are also input to the display circuit 16 .

As mentioned above, the step counter 13 is now
emits a step signal _S0 , and the step of the memory circuit 6 is at _S0 . Initially, no writing has been done, so A≠B, and X=1, so the terminal
The output of _Q2 also becomes "1" and that signal is input to _W1N , so that the memory circuit 6 enters a write operation and the first write at step _S0 is performed. One cycle at step S ₀ (A ₀ ~
The first write is performed at Ao _-2 ), and in the second cycle ( _A0 to _Ao-2 ), A=B, so the output of the X=0 terminal _Q2 becomes "0". 2
From the cycle, the write operation is replaced by a read operation. Then, when the signal A that is sent sequentially is the same as the stored signal, that is, A=B
As long as continues, the step does not advance, and the read operation at step _S0 is repeated.

Next, when the input signal A that is sent is different from the stored input signal B, that is, A
The case where ≠B is satisfied will be explained.

If A≠ _B , _the output signal Terminal at the rising edge of the timing pulse
A "1" signal is output to _Q2 , and the "1" signal is transmitted to the AND circuit ₁₀ through the contact K1 of the changeover switch 9. While the pulse signal is "1", the AND circuit 10 inputs the "1" signal as a write command to the terminal W _1N of the memory circuit 6, and the memory circuit 6 enters the write operation, and the input signal of the terminal D _1N is specified. Write (remember) to an address. pulse signal
At the same time that CK becomes "0", the memory circuit 6 starts a read operation, and as described above, the memory of the memory circuit 6, that is, the input signal B is sent to the exclusive OR circuit 7 from the terminal D _put .

On the other hand, when A≠B, the "1" signal output from the terminal _Q2 , which is output at the rising edge of the timing pulse of the pulse signal n _-1 mentioned above, is incremented to the step counter 13 via the OR circuit 11. Since the signal SH is given, the step counter 13
A step signal S ₁ is emitted from the step S ₀ .
Shift from to S ₁ . As mentioned above, when the output of the terminal _Q2 of the temporary storage circuit 8 becomes a "1" signal, the temporary memory circuit 8 continuously becomes a "1" signal during the address signal _A0 to _Ao-2 issued by the address counter 3. It is held and only writes (new writes) are performed during that period.

As described above, the elements e ₀ , e ₁ ... of the electric control circuit E
...signal voltages V ₀ , V ₁ ... from e _n When V _o-2 does not change, no writing is performed and only reading is performed, and the signal voltages V ₀ , V ₁ ... change depending on the steps of the machine tool, etc. Only when the state has changed, the step counter 13 increments and writes the state to a new step in the memory circuit 6, and the above operation is repeated.
Completes writing (memory) corresponding to all steps of machine tools, etc.

(2) Next, the operation of the electric control circuit E is compared with the memory of the device of the present invention to diagnose each of its elements e ₀ , e ₁ . At this time, the write-diagnostic operation changeover switch 9 is switched to the contact _K2 side for diagnostic operation.
Then, the changeover switch 12 is once switched to the contact _C1 , and then switched to the contact _C2 side. and contact C ₁
When the step counter 13 is switched to the step counter 13, the reset signal RE is input.
S ₀ is issued and the step address returns to S ₀ .

In this case, as in the case of the previous write operation, the input signal A from the data selector 5 and the input signal B from the memory circuit 6, which are instructed by the address counter 3, are respectively input to the exclusive OR circuit 7. .

If A≠B, the output X becomes a “1” signal, and the flip-flop 8a of the temporary storage circuit 8
Input a “1” signal to terminal S _{1 of}
Then, a "1" signal as shown by the symbol M in the graph of FIG. 2A is output. The flip-flop 8b receiving this output outputs a "1" signal to the terminal S2 at the rising edge of the output pulse n _{-1 of} the address counter 3, and outputs a "1" signal to the terminal _Q2 as shown by the symbol N in the graph in FIG. Outputs a signal. This output signal is sent to the inverter circuit 14 and the timer circuit 15 through the contact _K2 of the changeover switch 9. As a result, the inverter circuit 14 inverts the above "1" signal to a "0" signal and inverts the OR circuit 1.
1, and a "0" signal is input to the step counter ₁₃ through contact C2 of the changeover switch 12, so the step counter 13 receives a step signal.
SH does not enter. Meanwhile, the timer 15 starts operating. Then, as shown in the second diagram, the address signal
When one cycle of A ₀ to _{A o-2} is completed and A=B in the next cycle, the address counter 3
At the rising edge of the output pulse signal n _-1 of the flip-flop 8b, the terminal _Q2 output of the flip-flop 8b changes from 1 to 0 as shown by the symbol P in the graph of FIG. As shown in the figure, the step counter 13 receives a step signal SH that changes from 0 to 1, and the step counter 13 issues the next step signal _S1 . Also, since a "0" signal is input to the timer 15, the operation is stopped and reset.

In this way, the signal voltage of each element e ₀ , e ₁ , ...
When V ₀ , V ₁ , . . . match the memory, the step counter 13 issues step signals S ₀ to _{S o} to read out the memory of the next step in the memory circuit 6, and thereafter diagnoses each step sequentially in the same manner. It is something. By repeating this, the diagnosis up to the step stored at the time of writing is completed, and one cycle is completed, and the diagnostic operation continues this cycle. The time it takes to advance from one step to the next is a preset time (timer 15).
As long as the above cycle is carried out within the set time period), the above cycle continues, and it is confirmed that there is no abnormality in the electric circuit.

(3) In case of failure or deterioration, each element e ₀ , e ₁ , ... of the electric control circuit E
If a failure or deterioration occurs in any of the above, the signal voltages V ₀ , V ₁ ... will not match the memory,
A=B does not hold, and a "1" signal as shown by the dotted line W in FIG.
_Q2 continues to output a "1" signal. Therefore, in the timer 15, since the output of the terminal _Q2 does not become a "0" signal within the timer setting time, a timer up signal, that is, an alarm signal T _OUT is outputted and sent to the display circuit 16. is the signal voltage V ₀ ~V _o-2 at this A≠B,
Whether address signals A ₀ to _{A o-2} , steps S ₀ to _{S o} , and signal A are at H level or L level is displayed. Therefore, it is possible to know the failed or deteriorated element and the state of the failure or deterioration.

In the above embodiment, the present apparatus is constructed of a wire logic circuit, but it goes without saying that it can also be constructed of a control device using a microcomputer. Further, in the above device, an alarm device may be activated together with the display circuit. Further, the setting time of the timer 15 is appropriately determined in accordance with the time of the operating step of the machine tool, and is preferably set to be at least longer than the time during which the operating step of the machine tool continues in the same state.

As described above, according to the present invention, it is possible to diagnose whether each element of an electric circuit is good, bad, or deteriorated.The effects of the present invention can be summarized as follows.

1. Since the normal operation of the electrical circuit is automatically memorized and then the output voltage of the element is compared with this memorized data for diagnosis, it is highly versatile and does not require programming. Can be immediately applied to circuits.

2. Writing is not performed when the output voltage of the electric circuit element does not change, but is performed when it changes, so the amount of memory is kept to the minimum necessary limit, and the storage capacity can be reduced.

3. Since it is possible to constantly and automatically monitor whether the elements are good or defective, maintenance personnel can be saved, and if a malfunction occurs, it can be detected immediately, and malfunctioning elements are immediately displayed, so repairs can be carried out quickly. It is possible to improve the operating rate of machine tools, etc.

4. Not only defective elements but also their deterioration can be detected immediately, making it possible to prevent electrical circuit failures and further improve the operating rate of machine tools.

[Brief explanation of the drawing]

FIG _. 1 is a block diagram showing an outline of an embodiment of _the present invention, FIG. FIG. 3 is an explanatory diagram showing the increment of the step counter 13. 4... Comparison circuit, 6... Memory circuit, 7... Circuit, 16... Display circuit.

Claims (1)

[Claims] 1. A comparison circuit that inputs electrical signals from each element of an electrical control circuit in a machine tool, etc., compares them with a preset reference value, and outputs a digital signal, and an address corresponding to the number of each element of the electrical circuit. a memory circuit which has a storage capacity of a number of bits corresponding to the multiplier value of the number of steps corresponding to the number of steps of the machine tool, etc., and sequentially inputs and stores the output signals of the comparison circuit; an address counter that inputs an address signal to the circuit; a step counter that inputs a step signal to the memory circuit; and an exclusive OR that inputs the input signal generated from the comparison circuit and the input signal stored in the memory circuit. a temporary memory circuit that inputs the output of the exclusive OR circuit; a write diagnostic operation changeover switch provided between the temporary memory circuit and the step counter and the memory circuit; A timer connected to a diagnostic operation side contact of a changeover switch, and a display circuit connected to this timer, and each element of the electric control circuit is provided by switching the write-diagnosis operation changeover switch to the write operation side. By storing the normal state of the electrical control circuit in the memory circuit and switching the write-diagnosis operation changeover switch to the diagnostic operation side, the state of each element of the electric control circuit can be determined by comparing it with the normal state. An electrical circuit failure diagnosis device characterized by: