JPS6462740A - Reading/writing circuit for memory card - Google Patents

Reading/writing circuit for memory card

Info

Publication number
JPS6462740A
JPS6462740A JP21958687A JP21958687A JPS6462740A JP S6462740 A JPS6462740 A JP S6462740A JP 21958687 A JP21958687 A JP 21958687A JP 21958687 A JP21958687 A JP 21958687A JP S6462740 A JPS6462740 A JP S6462740A
Authority
JP
Japan
Prior art keywords
memory card
memory
circuit
readable
address range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21958687A
Other languages
Japanese (ja)
Inventor
Waichiro Tsujita
Yasuo Shimizu
Tetsuya Saito
Rei Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP21958687A priority Critical patent/JPS6462740A/en
Publication of JPS6462740A publication Critical patent/JPS6462740A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the breakdown of the memory contents of a memory card, by providing a switching means for switching the outputs of plural pieces of logic circuits in accordance with a readable/writable address range of the memory card to be used. CONSTITUTION:A device selecting signal switching circuit 40 and a set signal generating circuit 60 are provided. That is, the titled circuit is constituted by having a device selecting signal switching circuit 44 by which a device selecting signal CS goes to active '0' only in a readable/writable address range of an installed memory card 1, especially, OR gates 46-1-46-5 and three-state buffers 47-1-47-5. In such a way, in a reading-out/writing circuit in which the memory cards 1 of several kinds of memory capacities can be used, it is prevented that the memory content of the memory card 1 is broken down erroneously by a write operation which has exceeded the readable/writable address range of the installed memory card 1.
JP21958687A 1987-09-02 1987-09-02 Reading/writing circuit for memory card Pending JPS6462740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21958687A JPS6462740A (en) 1987-09-02 1987-09-02 Reading/writing circuit for memory card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21958687A JPS6462740A (en) 1987-09-02 1987-09-02 Reading/writing circuit for memory card

Publications (1)

Publication Number Publication Date
JPS6462740A true JPS6462740A (en) 1989-03-09

Family

ID=16737853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21958687A Pending JPS6462740A (en) 1987-09-02 1987-09-02 Reading/writing circuit for memory card

Country Status (1)

Country Link
JP (1) JPS6462740A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6058540B2 (en) * 1978-05-26 1985-12-20 コンパニ−・アンテルナシヨナル・プ−ル・ランフオルマテイク・セ−イイ・ハニ−ウエル・ブル Method for testing a reference zone of a data carrier and apparatus for carrying out the method
JPS6270957A (en) * 1985-09-24 1987-04-01 Hitachi Ltd Automatic discriminating method for memory capacity
JPS62180585A (en) * 1986-02-04 1987-08-07 Tokyo Electric Co Ltd Chip selecting circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6058540B2 (en) * 1978-05-26 1985-12-20 コンパニ−・アンテルナシヨナル・プ−ル・ランフオルマテイク・セ−イイ・ハニ−ウエル・ブル Method for testing a reference zone of a data carrier and apparatus for carrying out the method
JPS6270957A (en) * 1985-09-24 1987-04-01 Hitachi Ltd Automatic discriminating method for memory capacity
JPS62180585A (en) * 1986-02-04 1987-08-07 Tokyo Electric Co Ltd Chip selecting circuit

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