JPS6458150A - Sweep/tracking control circuit for demodulator - Google Patents

Sweep/tracking control circuit for demodulator

Info

Publication number
JPS6458150A
JPS6458150A JP62214598A JP21459887A JPS6458150A JP S6458150 A JPS6458150 A JP S6458150A JP 62214598 A JP62214598 A JP 62214598A JP 21459887 A JP21459887 A JP 21459887A JP S6458150 A JPS6458150 A JP S6458150A
Authority
JP
Japan
Prior art keywords
signal
init
circuit
counter
tracking control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62214598A
Other languages
Japanese (ja)
Other versions
JPH0761088B2 (en
Inventor
Etsuko Ito
Mitsuhiro Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62214598A priority Critical patent/JPH0761088B2/en
Publication of JPS6458150A publication Critical patent/JPS6458150A/en
Publication of JPH0761088B2 publication Critical patent/JPH0761088B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To exclude a counter counting INIT signal intervals to reduce the scale of hardware by providing a differentiating (shift) circuit and an INIT detection circuit. CONSTITUTION:A differentiation (shift) circuit 68 receives an ICAR signal and a demodulator clock DEM CLK and generates a signal 1 of one bit width (one period of DEM CLK) and uses it as forward/backward protection counters 62, 64. In receiving the INIT signal, the forward protection counter 64 is loaded. The signal 1 is given to an INIT detecting circuit 60 and the said circuit 66 is set by the said signal 1 when the INIT signal comes just before the signal 1. Since the counter clock signal 1 appears just after the INIT signal, then the sweep tracking control signal S/T is changed immediately depending whether the INIT signal by protection stage number comes or does not come.
JP62214598A 1987-08-28 1987-08-28 Demodulator sweep / tracking control circuit Expired - Lifetime JPH0761088B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62214598A JPH0761088B2 (en) 1987-08-28 1987-08-28 Demodulator sweep / tracking control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62214598A JPH0761088B2 (en) 1987-08-28 1987-08-28 Demodulator sweep / tracking control circuit

Publications (2)

Publication Number Publication Date
JPS6458150A true JPS6458150A (en) 1989-03-06
JPH0761088B2 JPH0761088B2 (en) 1995-06-28

Family

ID=16658368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62214598A Expired - Lifetime JPH0761088B2 (en) 1987-08-28 1987-08-28 Demodulator sweep / tracking control circuit

Country Status (1)

Country Link
JP (1) JPH0761088B2 (en)

Also Published As

Publication number Publication date
JPH0761088B2 (en) 1995-06-28

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