JPS6458067A - Paint-out processor - Google Patents

Paint-out processor

Info

Publication number
JPS6458067A
JPS6458067A JP21590787A JP21590787A JPS6458067A JP S6458067 A JPS6458067 A JP S6458067A JP 21590787 A JP21590787 A JP 21590787A JP 21590787 A JP21590787 A JP 21590787A JP S6458067 A JPS6458067 A JP S6458067A
Authority
JP
Japan
Prior art keywords
paint
polygon
inhibited
area
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21590787A
Other languages
Japanese (ja)
Other versions
JP2897209B2 (en
Inventor
Takeshi Nitta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daikin Industries Ltd
Original Assignee
Daikin Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daikin Industries Ltd filed Critical Daikin Industries Ltd
Priority to JP62215907A priority Critical patent/JP2897209B2/en
Publication of JPS6458067A publication Critical patent/JPS6458067A/en
Application granted granted Critical
Publication of JP2897209B2 publication Critical patent/JP2897209B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To shorten the paint-out processing time by providing a hole memory which uses the graphic data that carries out no paint-out operation as an input and outputs the corresponding write inhibiting signal. CONSTITUTION:In case a paint-out operation is required for the inside of a comparatively large polygon area and at the same time this polygon includes a polygon area where the internal paint-out is inhibited, this inhibited polygon is discriminated from other ones and written into a hole memory 4. Then the data written into the memory 4 is read out and supplied to a drawing means 1 as the write control signal. Thus it is possible to perform the paint-out processing to an entire area except an inhibited area.
JP62215907A 1987-08-28 1987-08-28 Coloring processing equipment Expired - Fee Related JP2897209B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62215907A JP2897209B2 (en) 1987-08-28 1987-08-28 Coloring processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62215907A JP2897209B2 (en) 1987-08-28 1987-08-28 Coloring processing equipment

Publications (2)

Publication Number Publication Date
JPS6458067A true JPS6458067A (en) 1989-03-06
JP2897209B2 JP2897209B2 (en) 1999-05-31

Family

ID=16680226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62215907A Expired - Fee Related JP2897209B2 (en) 1987-08-28 1987-08-28 Coloring processing equipment

Country Status (1)

Country Link
JP (1) JP2897209B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918534A (en) * 1972-06-14 1974-02-19
JPS61239384A (en) * 1985-04-05 1986-10-24 Fujitsu Ltd Method for improving recognition rate in graphic recognition

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918534A (en) * 1972-06-14 1974-02-19
JPS61239384A (en) * 1985-04-05 1986-10-24 Fujitsu Ltd Method for improving recognition rate in graphic recognition

Also Published As

Publication number Publication date
JP2897209B2 (en) 1999-05-31

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees