JPS6454546A - Trace system for program - Google Patents

Trace system for program

Info

Publication number
JPS6454546A
JPS6454546A JP62211200A JP21120087A JPS6454546A JP S6454546 A JPS6454546 A JP S6454546A JP 62211200 A JP62211200 A JP 62211200A JP 21120087 A JP21120087 A JP 21120087A JP S6454546 A JPS6454546 A JP S6454546A
Authority
JP
Japan
Prior art keywords
terminal
register
processor
contents
specific code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62211200A
Other languages
Japanese (ja)
Inventor
Yasuo Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62211200A priority Critical patent/JPS6454546A/en
Publication of JPS6454546A publication Critical patent/JPS6454546A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To sufficiently obtain minute trace information without making a processor large in size, by providing a trace register and an output terminal of its contents, on the processor, and outputting a specific code contained in a processing routine. CONSTITUTION:A trace register 12 and an output terminal 16 of its contents, and a terminal 18 to which a signal S for showing a fact that a data of the register 12 has been varied is applied are provided on a processor 10 for controlling peripheral equipments A, B. In this state, in case when the processor 10 executes a processing in accordance with an interruption request from the equipments A, B, an instruction for storing a specific code allocated to its processing routine, in the register 12 is inserted in advance into a suitable part of each processing routine of a firmware. Accordingly, whenever the specific code is set to the register 12, the signal S appears in the terminal 18, therefore, when a data input terminal of a logic scope, etc. and a data input use signal terminal are connected to the terminal 16 and the terminal 18, respectively, the contents of the register 12 can be observed visually. In such a way, minute trace information can be obtained enough without making the processor 10 large in size.
JP62211200A 1987-08-25 1987-08-25 Trace system for program Pending JPS6454546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62211200A JPS6454546A (en) 1987-08-25 1987-08-25 Trace system for program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62211200A JPS6454546A (en) 1987-08-25 1987-08-25 Trace system for program

Publications (1)

Publication Number Publication Date
JPS6454546A true JPS6454546A (en) 1989-03-02

Family

ID=16602022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62211200A Pending JPS6454546A (en) 1987-08-25 1987-08-25 Trace system for program

Country Status (1)

Country Link
JP (1) JPS6454546A (en)

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