JPS6453614A - Amplifier - Google Patents
AmplifierInfo
- Publication number
- JPS6453614A JPS6453614A JP62210680A JP21068087A JPS6453614A JP S6453614 A JPS6453614 A JP S6453614A JP 62210680 A JP62210680 A JP 62210680A JP 21068087 A JP21068087 A JP 21068087A JP S6453614 A JPS6453614 A JP S6453614A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- input terminal
- differential
- direct current
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
PURPOSE:To secure a direct current balance with one capacitor by executing the direct current negative feedback of a feedback 1 to a first differential amplifier and inputting the difference between an output voltage and the voltage of the capacitor to constitute the negative feedback into a second differential amplifier. CONSTITUTION:An output terminal 4 of a differential amplifier 1, an inverting input terminal 1b and one side input terminal 2a of a differential amplifier 2 are respectively connected with resistance 12 and 8, the inverting input terminal 1b and other side input terminal 2b of the amplifier 2 are connected with a resistance 13, the input terminal 2b and a ground are connected with a capacitor 14 and the input terminal 2b and an output terminal 4 are respectively connected with a resistance 15. By the constitution, the direct current negative feedback is applied to the amplifier 1 with a feedback ratio '1' and the difference between the voltage of the capacitor 14 and the voltage of the output terminal 4 to constitute the negative feedback is added to the differential input terminal of the amplifier 2. As such a result, for the differential input of the amplifier 2, the direct current balance is held regardless of an input Vi, for the differential input of the amplifier 1, the gain of the amplifier 1 is largely set and thus, the direct current balance is held regardless of the input Vi.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62210680A JPS6453614A (en) | 1987-08-25 | 1987-08-25 | Amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62210680A JPS6453614A (en) | 1987-08-25 | 1987-08-25 | Amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6453614A true JPS6453614A (en) | 1989-03-01 |
Family
ID=16593330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62210680A Pending JPS6453614A (en) | 1987-08-25 | 1987-08-25 | Amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6453614A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6096424A (en) * | 1983-11-01 | 1985-05-30 | Nec Corp | Molding die |
US6326975B1 (en) | 1996-06-27 | 2001-12-04 | Cirrus Logic, Inc. | Priority methods for texture map storage |
-
1987
- 1987-08-25 JP JP62210680A patent/JPS6453614A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6096424A (en) * | 1983-11-01 | 1985-05-30 | Nec Corp | Molding die |
US6326975B1 (en) | 1996-06-27 | 2001-12-04 | Cirrus Logic, Inc. | Priority methods for texture map storage |
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