JPS645300U - - Google Patents
Info
- Publication number
- JPS645300U JPS645300U JP9917287U JP9917287U JPS645300U JP S645300 U JPS645300 U JP S645300U JP 9917287 U JP9917287 U JP 9917287U JP 9917287 U JP9917287 U JP 9917287U JP S645300 U JPS645300 U JP S645300U
- Authority
- JP
- Japan
- Prior art keywords
- driver
- input signal
- semiconductor burn
- burn
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Description
第１図は本考案の一実施例の概要を示すブロツ
ク図、第２図はそのドライバセレクトマトリツク
ス４の簡略化した例で示す回路図、第３図イはそ
のドライバセレクトマトリツクス、ロ，ハはその
切り換え例を示す説明図である。
１……半導体バアン・イン装置、２……ドライ
バ、３……ドライバ入力信号、４……ドライバセ
レクトマトリツクス、Ａ，Ｃ，Ｄ……入力信号。
FIG. 1 is a block diagram showing an overview of an embodiment of the present invention, FIG. 2 is a circuit diagram showing a simplified example of the driver select matrix 4, and FIG. C is an explanatory diagram showing an example of the switching. DESCRIPTION OF SYMBOLS 1... Semiconductor burn-in device, 2... Driver, 3... Driver input signal, 4... Driver select matrix, A, C, D... Input signal.
Claims (1)
入力信号装置との間にドライバセレクトマトリツ
クスを置き、任意の入力信号を任意のドライバに
接続することを特徴とする半導体バアン・イン装
置用ドライバ入力信号プログラム装置。 A driver input signal programming device for a semiconductor burn-in device, characterized in that a driver select matrix is placed between the driver of the semiconductor burn-in device and a driver input signal device, and any input signal is connected to any driver. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9917287U JPS645300U (en) | 1987-06-26 | 1987-06-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9917287U JPS645300U (en) | 1987-06-26 | 1987-06-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS645300U true JPS645300U (en) | 1989-01-12 |
Family
ID=31326081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9917287U Pending JPS645300U (en) | 1987-06-26 | 1987-06-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS645300U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593967A (en) * | 1982-06-29 | 1984-01-10 | Nec Corp | Integrated circuit memory tester |
| JPS5945699A (en) * | 1982-09-07 | 1984-03-14 | Fujitsu Ltd | Ic memory testing device |
-
1987
- 1987-06-26 JP JP9917287U patent/JPS645300U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS593967A (en) * | 1982-06-29 | 1984-01-10 | Nec Corp | Integrated circuit memory tester |
| JPS5945699A (en) * | 1982-09-07 | 1984-03-14 | Fujitsu Ltd | Ic memory testing device |
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