JPS6452311U - - Google Patents
Info
- Publication number
- JPS6452311U JPS6452311U JP14898587U JP14898587U JPS6452311U JP S6452311 U JPS6452311 U JP S6452311U JP 14898587 U JP14898587 U JP 14898587U JP 14898587 U JP14898587 U JP 14898587U JP S6452311 U JPS6452311 U JP S6452311U
- Authority
- JP
- Japan
- Prior art keywords
- flat
- package
- electronic components
- metal layer
- container
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 1
- 239000013078 crystal Substances 0.000 description 1
Landscapes
- Casings For Electric Apparatus (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Description
第1図は本考案による電子部品用フラツトパツ
ケージを用いた圧電振動子の分解斜視図、第2図
は第1図の要部拡大断面図、第3図は従来の電子
部品用フラツトパツケージを用いた圧電振動子の
分解斜視図である。
1……下板、2,6……上板、3……音叉型水
晶振動子、101,201,601……金属層、
102,202……ガラス層。
Figure 1 is an exploded perspective view of a piezoelectric vibrator using a flat package for electronic components according to the present invention, Figure 2 is an enlarged sectional view of the main part of Figure 1, and Figure 3 is a conventional flat package for electronic components. 1 is an exploded perspective view of a piezoelectric vibrator using a 1... Lower plate, 2, 6... Upper plate, 3... Tuning fork type crystal resonator, 101, 201, 601... Metal layer,
102,202...Glass layer.
Claims (1)
らなり、この平板状容器の上板と下板の接合部に
金属層を設け、且つ平板状容器と上記金属層との
間に薄いガラス層を介在させたことを特徴とする
電子部品用フラツトパツケージ。 2 上記上板あるいは下板の少なくとも一方が純
度96%以上のアルミナで形成されたことを特徴
とする実用新案登録請求の範囲第1項記載の電子
部品用フラツトパツケージ。[Claims for Utility Model Registration] 1. Consisting of a pair of upper and lower flat containers for storing electronic components, a metal layer is provided at the joint between the upper and lower plates of the flat container, and the flat container and the metal layer A flat package for electronic components characterized by having a thin glass layer interposed between the package and the package. 2. The flat package for electronic components according to claim 1, wherein at least one of the upper plate and the lower plate is made of alumina with a purity of 96% or more.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14898587U JPS6452311U (en) | 1987-09-28 | 1987-09-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14898587U JPS6452311U (en) | 1987-09-28 | 1987-09-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6452311U true JPS6452311U (en) | 1989-03-31 |
Family
ID=31420796
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14898587U Pending JPS6452311U (en) | 1987-09-28 | 1987-09-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6452311U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60223143A (en) * | 1984-04-18 | 1985-11-07 | Nec Kansai Ltd | Packaging method |
-
1987
- 1987-09-28 JP JP14898587U patent/JPS6452311U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60223143A (en) * | 1984-04-18 | 1985-11-07 | Nec Kansai Ltd | Packaging method |
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