JPS6450982A - Deblocking circuit - Google Patents

Deblocking circuit

Info

Publication number
JPS6450982A
JPS6450982A JP62208731A JP20873187A JPS6450982A JP S6450982 A JPS6450982 A JP S6450982A JP 62208731 A JP62208731 A JP 62208731A JP 20873187 A JP20873187 A JP 20873187A JP S6450982 A JPS6450982 A JP S6450982A
Authority
JP
Japan
Prior art keywords
output
reset signal
agc
circuit
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62208731A
Other languages
Japanese (ja)
Other versions
JPH0664136B2 (en
Inventor
Toshiaki Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62208731A priority Critical patent/JPH0664136B2/en
Publication of JPS6450982A publication Critical patent/JPS6450982A/en
Publication of JPH0664136B2 publication Critical patent/JPH0664136B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To automatically release a blocking state, by detecting the generation of the blocking state and controlling the AGC voltage of an AGC circuit so as to minimize the gain of a linear amplifier. CONSTITUTION:A local signal constant in frequency and a level is outputted from a local oscillator 7 and amplified under the gain control of an AGC circuit 6 by a linear amplifier 8 and outputted. A detection circuit 9 performs the envelope detection of the output of the amplifier to output said output to a comparator 10. The comparator 10 compares this detection output with a reference level to output a reset signal only when the detection output does not exceed the reference level and stops the output thereof when said output exceeds the reference level. A counter 11 does not perform counting when the reset signal is inputted while the output of the comparator 10 is received and starts counting when the input of the reset signal is stopped and outputs an AGC reset signal to the circuit 6 setting AGC voltage so as to minimize the gains of amplifiers 1, 2, 8 after the counting of a prescribed value is completed.
JP62208731A 1987-08-21 1987-08-21 Deblocking circuit Expired - Lifetime JPH0664136B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208731A JPH0664136B2 (en) 1987-08-21 1987-08-21 Deblocking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208731A JPH0664136B2 (en) 1987-08-21 1987-08-21 Deblocking circuit

Publications (2)

Publication Number Publication Date
JPS6450982A true JPS6450982A (en) 1989-02-27
JPH0664136B2 JPH0664136B2 (en) 1994-08-22

Family

ID=16561144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208731A Expired - Lifetime JPH0664136B2 (en) 1987-08-21 1987-08-21 Deblocking circuit

Country Status (1)

Country Link
JP (1) JPH0664136B2 (en)

Also Published As

Publication number Publication date
JPH0664136B2 (en) 1994-08-22

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