JPS6450525A - Heat treatment of iii-v semiconductor substrate - Google Patents

Heat treatment of iii-v semiconductor substrate

Info

Publication number
JPS6450525A
JPS6450525A JP20871487A JP20871487A JPS6450525A JP S6450525 A JPS6450525 A JP S6450525A JP 20871487 A JP20871487 A JP 20871487A JP 20871487 A JP20871487 A JP 20871487A JP S6450525 A JPS6450525 A JP S6450525A
Authority
JP
Japan
Prior art keywords
substrate
iii
periphery
heat treatment
inch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20871487A
Other languages
Japanese (ja)
Inventor
Masaaki Kuzuhara
Michihisa Kono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20871487A priority Critical patent/JPS6450525A/en
Publication of JPS6450525A publication Critical patent/JPS6450525A/en
Pending legal-status Critical Current

Links

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To enable a highly uniform and short-time heat treatment of a III-V semiconductor substrate having a large diameter, by mounting the substrate and a guard ring made of an infrared-ray absorber disposed on the periphery of the substrate on a substrate supporting plate made of transparent quartz glass with a mirror-polished flat surface, and heat treating it. CONSTITUTION:A III-V semiconductor substrate 4 and a guard ring 2 made of an infrared ray absorber disposed on the periphery of the substrate are mounted on a substrate supporting plate 5 made of quartz glass mirror-polished in a flat surface above and below, and heat treated. For example, a GaAs substrate 4 in which 5X10<12>cm<-2> of Si<+> is implanted into a semi-insulating 2-inch GaAs substrate having a plane orientation <100> is heat treated at 950 deg.C for 5 sec of conditions in a state that the periphery of a GaAs substrate 4 is surrounded by a guard ring 2. The short time heat treatment is conducted in an N2 gas or Ar gas atmosphere, and a tungsten halogen lamp is employed as a heat source. The ring 2 employs a 3-inch Si substrate in which a 2-inch diameter hole is opened at the center.
JP20871487A 1987-08-21 1987-08-21 Heat treatment of iii-v semiconductor substrate Pending JPS6450525A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20871487A JPS6450525A (en) 1987-08-21 1987-08-21 Heat treatment of iii-v semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20871487A JPS6450525A (en) 1987-08-21 1987-08-21 Heat treatment of iii-v semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS6450525A true JPS6450525A (en) 1989-02-27

Family

ID=16560868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20871487A Pending JPS6450525A (en) 1987-08-21 1987-08-21 Heat treatment of iii-v semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS6450525A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277119A (en) * 1988-06-27 1990-03-16 Tokyo Electron Ltd Heat treatment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0277119A (en) * 1988-06-27 1990-03-16 Tokyo Electron Ltd Heat treatment

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