JPS6444735U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is an embodiment of the present invention, Fig. 2 is a time chart of each signal in the embodiment of Fig. 1, Fig. 3 is an example of a conventional circuit, and Fig. 4 is a time chart of each signal in the example of Fig. 3. It is a chart diagram. In the figure, RS is a transmission request signal, CS is a transmission permission signal, SD is a transmission data signal, RS2 is a delayed transmission request signal, SD2 is an identification code, SD3 is a selected transmission data signal, LINE is a transmission line sending signal, and CD is a reception signal. A detection signal, RD1 is a received data signal, CD1 is an identification code detection signal, and RD is a received data signal after extra bit removal.

Claims (1)

[Scope of utility model registration request] In a data transmitting/receiving device that transmits and receives coded data via a transmission path and stops the transmission path sending signal (carrier) at the end of communication, the data transmitter side includes a delay circuit that delays a transmission request signal, an identification code generation circuit, and a transmitter. a switching circuit for selectively outputting a data signal and the output of the identification code generation circuit; an ON/OFF detection circuit for detecting that the output signal of the delay circuit is ON and the input signal is OFF; and a transmission exchange circuit; On the receiving side, there is a receiving switching circuit,
A delay circuit that delays the received data output from the reception exchange circuit, a code detection circuit that detects the identification code in the reception data, and a reception signal detection signal output from the reception conversion circuit are set when the reception signal detection signal output from the reception conversion circuit is OFF, and an RS flip-flop circuit that is reset by an identification code detection signal, an output of the ON/OFF detection circuit of the data transmitter is used as a switching control signal input of the switching circuit, and an output of the switching circuit is input to the transmission conversion circuit; The logical sum of the transmission request signal and the output of the delay circuit is input to the transmission conversion circuit, the reception signal detection signal of the data reception section is outputted to a terminal, etc., and the output signal of the reception data delay circuit is output from the RS flip-flop circuit. A data transmitting/receiving device characterized in that it clamps and outputs this as received data.