JPS63314936A - Start-stop synchronizing type data communication system - Google Patents

Abstract

PURPOSE:To obtain a long distance and to economize a system by using a terminal equipment by transforming a long space signal to plural framing infor mation to transmit a digital high speed data transmission line and reproducing the long space signal from the plural framing error information in an incoming call side. CONSTITUTION:Speed transformers 3, 4 having a transmission speed transform ing means 30 by defining plural framing errors to be the framing error informa tion, transforming and transmitting a data transmission speed at the time of receiving the long space signal of the plural frames and a receiving speed transforming means 31 for repeatedly transmitting the frame including the framing error information as the space signal, transmitting a mark signal accord ing to the receiving of normal frameing information and reproducing the space signal are respectively connected to a center 1 and the terminal equipment 2 through low speed data transmission lines 6, 7. Both the speed transformers 3, 4 are connected by the digital high speed data transmission line 5. Thereby, the long distance and the economization of a communication system can be realized.

Description

[Detailed Description of the Invention] [Summary] In an asynchronous data communication system, a long space signal is converted into a plurality of pieces of framing error information and transmitted over a digital high-speed data transmission line, and the receiving side receives the plurality of pieces of framing error information. By reproducing a long space signal from a conventional center and terminal equipment, the system can be extended over long distances and made more economical.

[Industrial application field]

The present invention relates to an asynchronous data communication system in which a center and terminal devices are connected via a high-speed data transmission line, and communication interrupt requests are made using conventional long space signals.

Asynchronous data communication systems are usually used as short-distance data communication systems using metallic lines, etc., but in order to increase long distances and make them more economical, it is difficult for the center side to connect them to, for example, a PCM multiplex transmission line. The terminal equipment side could not be done as is.

Therefore, both the center side and the terminal device side remain the same as before, and the PC
There is a demand for an asynchronous data communication system that can use M multiplexed transmission lines and the like.

[Prior art and problems to be solved by the invention] In a conventional asynchronous data communication system, a center and a terminal device are connected by an analog transmission line such as a metallic line, and communication is performed over a relatively short distance. It is used.

In such a system, while on standby, both the transmitting and receiving lines are in a mark signal state, and the requesting side sends a long space signal of, for example, about 200 ms to the other side as an interrupt request signal, and after receiving a response, data communication is started. It is like doing something.

In order to increase the distance of data transmission lines and make them more economical by multiplexing, it is necessary to use PCM multiplex transmission lines that use digital signals. 8 bit data,
Framing bits (mark signals) are used as one frame and are sent in frame units, and when transmitting these frames over a PCM multiplex transmission line, etc., if a long space signal containing multiple frames is sent, the framing bits will not arrive. Therefore, since a framing error is detected and the bit position is transmitted as a mark signal, a long space signal cannot be transmitted.

Therefore, there is a problem that conventional centers and terminal devices cannot be directly connected.

[Means for solving problems]

FIG. 1 is a block diagram of the principle of the present invention.

In the figure, 1 is a center, 2 is a terminal device, 6.7 is a low-speed data transmission line (hereinafter referred to as LSL), and 5 is a digital high-speed data transmission line (hereinafter referred to as H3L).

According to the present invention, 3 and 4 indicate speed conversion devices, and 30 detects a plurality of framing errors when receiving a long space signal including a plurality of frames, and uses each of the framing errors as framing error information, When the transmission speed conversion means 31 receives the above-mentioned framing error information and sends the data after converting the data transmission speed,
After converting the data transmission speed, the reception speed converting means repeatedly sends out frames containing the framing error information as space signals, and when normal framing information is received, sends out a mark signal to reproduce a long space signal.

[Effect]

Data transmission in an asynchronous data communication system is as shown in the explanatory diagram of data transmission by speed conversion in Fig. 2. For example, from the center to SL6 in Fig. 1, the transmission speed is
1, a frame consisting of a start bit S (space signal), one character data D (a combination of a space signal and a mark signal), and a framing bit F (a mark signal) is sequentially transmitted. Transmission speed conversion means 30 of speed conversion device 3
converts the frame string to a transmission rate of 2, sends it to the HSL 5, and sends it to the rate conversion device 4.

The receiving speed converting means 31 of the speed converting device 4 converts the frame sequence to the original transmission speed 1 again, sends it to the LSL 7, and causes the terminal device 2 to receive it. At this time, if the framing bit F of the frame is a space signal, it is sent as framing error information as is, but relief processing such as retransmission is performed by processing on the receiving side.

The same applies to data transmission from the terminal device 2 to the center 1.

Prior to the above data transmission, the center 1 sends a long space signal to the terminal device 2 to request an interrupt.

FIG. 3 is an explanatory diagram of long space signal transmission. When the center 1 transmits a long space signal (frames are indicated by dotted lines and S, D, and F) including a plurality of frames as shown in FIG. Therefore, it is identified as a framing error, and after converting to a transmission rate of 2, character data D and framing bit F are sent out as space signals for each frame. Therefore, the long space signal is transmitted to H3L5 as a plurality of framing error information.

Upon receiving the framing error information, the reception speed conversion means 31 converts the transmission speed and sends the frame including the framing error information to the terminal device 2 as a space signal.

As shown in FIG. 3, when the long space signal ends and returns to the mark signal state, the transmission speed conversion means 30 detects that the framing bit F of the frame corresponding to that point is a mark signal, and converts the transmission speed. The framing bit F of the subsequent frame is made into a mark signal and sent as normal framing information.

The receiving speed converting means 31 that has received the normal framing information sends a mark signal to the terminal device 2.

In this way, the long space signal is transmitted to H3L5 as a plurality of pieces of framing error information, so the system can be extended over long distances and made more economical by using the center and terminal devices as they are.

〔Example〕

The present invention will be specifically explained below with reference to illustrated examples.

FIG. 4 is a block diagram of a data communication system according to one embodiment of the present invention. The same reference numerals indicate the same objects throughout the figures.

In FIG. 4, a serial-to-parallel conversion circuit 300. register 30
1. NAND element 302. Low speed oscillator 303. High speed oscillator 304. The sending circuit 305 corresponds to the sending speed converting means 30 in FIG. 1, and the receiving circuit 310. High speed oscillator 311. Register 312, serial/parallel conversion circuit 313. The signal control circuit 314 corresponds to the receiving speed converting means 31 in FIG.

Although FIG. 4 only shows data transmission from center 1 to terminal device 2, the diagram from terminal device 2 to center 1 in the opposite direction has a configuration in which terminal device 2 and center 1 are interchanged, and the operation is the same. This is omitted because it is.

In FIG. 4, a long space signal as shown in FIG. 3 is sent from the center 1 to the LSL 60 at a transmission rate of 1 (for example 12
008PS), the serial/parallel conversion circuit 300 operated by the low-speed oscillator 303 operates in the same way as when receiving the frame indicated by the dotted line in FIG. The information for each program is set sequentially and in parallel.

The output path 305 is operated by the clock from the high-speed oscillator 304, reads the contents of the register 301, converts the transmission speed, and sets the transmission speed to H3L50 as 2, for example 64.
Send using KBPS.

The start hit S9 character data D and framing bit F for l frames are set in the register 301, but in the case of a long space signal, since the framing bit F is a space signal, a framing error is not detected. Terminal FE becomes logic value 1, and NAND element 3
02, a logical value O is set in the framing bit F portion of the register 301, which becomes framing error information (space signal). Also, start bit S.

All character data D is also set to a logical value O (representing a space signal).

Therefore, in H3L50, as shown in H3L5 in Figure 3, frames with framing error information are transmitted at a transmission rate of ■2, and only the frame at the end of the long space signal has normal framing information (mark signal). Sent as a frame.

The HSL 50 is multiplexed with other similar lines in a multiplexer 8, and then connected to the HSL in a multiplexer 9 via a highway 80.
It is separated into 3L51 and becomes the same data transmission form as H3L50 again. This makes data transmission long distance and economical.

The receiving circuit 310 of the speed conversion device 4 that has received the frame composed of only space signals by the long space signal is operated by the clock of the high speed oscillator 311, and serially inputs the contents of the transmitted frame into the register 312. Set sequentially.

The serial-to-parallel conversion circuit 313 reads the contents of the register 312 in parallel, converts the data to the transmission speed 1 using the clock of the low-speed oscillator 315, and converts the contents of the register 312 into the L
It is transmitted to the terminal device 2 via the SL 70.

The signal control circuit 314 sends a space signal to the LSL 70 when the framing bit F of the register 312 has a logical value of 0 (space signal, framing error information), and when the framing bit F has a logical value of 1 (mark signal). When normal framing information is received, the contents of the register 312 are sent out as is.

For this reason, the signal control circuit 31
4, space signals are continuously sent out, and when the long space signal ends and normal framing information is received, a mark signal is sent out.
A long space signal as shown in SL7 will be sent, and the terminal device 2 will identify that an interrupt request has been made from the center 1, prepare Y$ for data reception, and return a preparation completion signal to the center 1. do.

〔Effect of the invention〕

As explained in detail above, in the present invention, a long space signal can be transmitted by continuously transmitting framing error information on a digital high-speed data transmission line. By using the terminal equipment and center used for communication as they are, it is possible to realize long-distance and economical communication systems.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is an explanatory diagram of data transmission by speed conversion, Fig. 3 is an explanatory diagram of long space signal transmission, and Fig. 4 is a data communication of one embodiment of the present invention. FIG. 2 is a block diagram of the system. In the figure, 1 is a center, 2 is a terminal device, 3.4 is a speed conversion device, 5 is a digital high-speed data transmission line, 6.7 is a low-speed data transmission line, 30 is a transmission speed conversion means, and 31 is a reception speed conversion means shows. 7〈Representative Patent Attorney Sada Igeta-・, 'Apologies:・2'-

Claims (1)

[Claims] Transmission speed conversion means that detects a plurality of framing errors when a long space signal for a plurality of frames is received, converts the data transmission speed and sends each of the framing errors as framing error information. (30) When the framing error information is received, after converting the data transmission rate, the frame including the framing error information is repeatedly transmitted as a space signal, and a mark signal is transmitted upon normal framing information reception. Reception speed conversion means (31) for reproducing long space signals
) are connected to each of the center (1) and the terminal device (2) via low-speed data transmission lines (6, 7), and both speed converters (
3 and 4) are connected by a digital high-speed data transmission line (5).