JPS6442136A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6442136A
JPS6442136A JP62198838A JP19883887A JPS6442136A JP S6442136 A JPS6442136 A JP S6442136A JP 62198838 A JP62198838 A JP 62198838A JP 19883887 A JP19883887 A JP 19883887A JP S6442136 A JPS6442136 A JP S6442136A
Authority
JP
Japan
Prior art keywords
polyimide
semiconductor element
infrared rays
far infrared
based adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62198838A
Other languages
Japanese (ja)
Inventor
Munekazu Tanaka
Takanori Miyoshi
Katsuhiko Yamaguchi
Naoki Inoue
Atsushi Hino
Chiaki Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP62198838A priority Critical patent/JPS6442136A/en
Publication of JPS6442136A publication Critical patent/JPS6442136A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01077—Iridium [Ir]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To realize an efficient manufacturing method whose working efficiency and productivity are excellent without spoiling a proper fixation of a semiconductor element by a method wherein, after a polyimide-based adhesive has been irradiated with far infrared rays, it is heated, dried and hardened by forming an imide. CONSTITUTION:A polyimide-based adhesive 4 composed of an inert solvent solution of a precursor of a polyimide is coated on a die pad 2 of a lead frame 1; a semiconductor element 3 is mounted on it; the assembly is irradiated with far infrared rays. The heating efficiency by using the far infrared rays is very high because their wavelength coincides well with an absorption wavelength of the polyimide. Because this is a heating method by the radiant heat, the heat reaches the inside from the side of the polyimide-based adhesive coated layer 4 due to a scattering phenomenon or the like; the heat is absorbed and is transformed into the thermal energy. Accordingly, the layer is hardened without irregularity; a hardening action proceeds uniformly without causing any distortion. Because a solvent hardly remains inside the layer, it is possible to prevent an air bubble from being generated. By this setup, it is possible to fix the semiconductor element in a short time without adversely affecting the semiconductor element and to enhance the productivity and the working efficiency remarkably.
JP62198838A 1987-08-07 1987-08-07 Manufacture of semiconductor device Pending JPS6442136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62198838A JPS6442136A (en) 1987-08-07 1987-08-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62198838A JPS6442136A (en) 1987-08-07 1987-08-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6442136A true JPS6442136A (en) 1989-02-14

Family

ID=16397758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62198838A Pending JPS6442136A (en) 1987-08-07 1987-08-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6442136A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH059455A (en) * 1991-07-02 1993-01-19 Sumitomo Bakelite Co Ltd Adhesive for airtight sealing
WO1993024583A1 (en) * 1992-06-04 1993-12-09 Sumitomo Bakelite Company Limited Film adhesive and production thereof
JPH0673364A (en) * 1992-08-26 1994-03-15 Sumitomo Bakelite Co Ltd Adhesive for airtight sealing
EP0691679A3 (en) * 1994-06-07 1996-05-01 Texas Instruments Inc Process for manufacturing an integrated circuit package assembly
US5783025A (en) * 1994-06-07 1998-07-21 Texas Instruments Incorporated Optical diebonding for semiconductor devices
US6226452B1 (en) 1997-05-19 2001-05-01 Texas Instruments Incorporated Radiant chamber for simultaneous rapid die attach and lead frame embed for ceramic packaging
US6303907B1 (en) 1995-04-25 2001-10-16 Texas Instruments Incorporated Radiant chamber and method for lid seal in ceramic packaging

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH059455A (en) * 1991-07-02 1993-01-19 Sumitomo Bakelite Co Ltd Adhesive for airtight sealing
WO1993024583A1 (en) * 1992-06-04 1993-12-09 Sumitomo Bakelite Company Limited Film adhesive and production thereof
JPH0673364A (en) * 1992-08-26 1994-03-15 Sumitomo Bakelite Co Ltd Adhesive for airtight sealing
EP0691679A3 (en) * 1994-06-07 1996-05-01 Texas Instruments Inc Process for manufacturing an integrated circuit package assembly
US5783025A (en) * 1994-06-07 1998-07-21 Texas Instruments Incorporated Optical diebonding for semiconductor devices
KR100377981B1 (en) * 1994-06-07 2003-05-27 텍사스 인스트루먼츠 인코포레이티드 Optical Curing Process for Integrated Circuit Packge Assembly
US6303907B1 (en) 1995-04-25 2001-10-16 Texas Instruments Incorporated Radiant chamber and method for lid seal in ceramic packaging
US6226452B1 (en) 1997-05-19 2001-05-01 Texas Instruments Incorporated Radiant chamber for simultaneous rapid die attach and lead frame embed for ceramic packaging

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