JPS6441569A - Image signal processor - Google Patents

Image signal processor

Info

Publication number
JPS6441569A
JPS6441569A JP62198527A JP19852787A JPS6441569A JP S6441569 A JPS6441569 A JP S6441569A JP 62198527 A JP62198527 A JP 62198527A JP 19852787 A JP19852787 A JP 19852787A JP S6441569 A JPS6441569 A JP S6441569A
Authority
JP
Japan
Prior art keywords
data
executing
subtraction
addition
image data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62198527A
Other languages
Japanese (ja)
Inventor
Yuji Maruyama
Kiyoshi Takahashi
Katsuo Nakazato
Hiroyoshi Tsuchiya
Toshiharu Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62198527A priority Critical patent/JPS6441569A/en
Publication of JPS6441569A publication Critical patent/JPS6441569A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00—Geometric image transformations in the plane of the image
    • G06T3/40—Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4007—Scaling of whole images or parts thereof, e.g. expanding or contracting based on interpolation, e.g. bilinear interpolation

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
  • Editing Of Facsimile Originals (AREA)

Abstract

PURPOSE:To execute a high-speed high-density image data conversion by calculating, to adjoining image data A and B, the adding value (x) and subtracting value (y) of the data, executing the addition and subtraction of the A, B, (x) and (y) respectively by a prescribed rate and obtaining respective interpolating data. CONSTITUTION:To the adjoining image data A and B, the adding value (x) and subtracting value (y) are calculated by an addition and subtraction calculating circuit 5. An interpolating data arithmetic circuit 8 executes the addition and subtraction of the A, B, (x) and (y) respectively by the prescribed rate (provided that 2<-n>-fold:(n) is a positive integer) and obtains respective interpolating data. The data are successively outputted by a selection output circuit 10. In such a way, by executing the operation of A, B X and Y interpolating data after executing the operation of the (x) and (y), the number of stages in which an adder in the whole is series-connected can be reduced, and, as a result, an operation time in the whole can be shortened.
JP62198527A 1987-08-07 1987-08-07 Image signal processor Pending JPS6441569A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62198527A JPS6441569A (en) 1987-08-07 1987-08-07 Image signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62198527A JPS6441569A (en) 1987-08-07 1987-08-07 Image signal processor

Publications (1)

Publication Number Publication Date
JPS6441569A true JPS6441569A (en) 1989-02-13

Family

ID=16392625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62198527A Pending JPS6441569A (en) 1987-08-07 1987-08-07 Image signal processor

Country Status (1)

Country Link
JP (1) JPS6441569A (en)

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