JPS6441155U - - Google Patents
Info
- Publication number
- JPS6441155U JPS6441155U JP1987137167U JP13716787U JPS6441155U JP S6441155 U JPS6441155 U JP S6441155U JP 1987137167 U JP1987137167 U JP 1987137167U JP 13716787 U JP13716787 U JP 13716787U JP S6441155 U JPS6441155 U JP S6441155U
- Authority
- JP
- Japan
- Prior art keywords
- control
- led display
- led chip
- display body
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 238000007789 sealing Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
- 241000191291 Abies alba Species 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
第1図は本考案の実施例によるLED表示体を
示す図、第2図は該LED表示体の制御用ICを
示すブロツク構成図、第3図は該制御用ICの発
振回路の具体的な回路構成を示す図、第4図は上
記制御用ICの駆動回路の具体的な回路構成を示
す図、第5図は上記制御用ICの擬似ランダムパ
ルス発生回路の具体的な回路構成を示す図、第6
図は従来のクリスマスツリー用電飾装置を示す図
である。 1a,1b……リード、2……LEDチツプ、
3……ワイヤ、3a……スルーホール、4……封
止樹脂、5a……絶縁層、5b……絶縁基板、6
a,6b……第1、第2の制御用IC、7……発
振回路、8a,8b……駆動回路、9……擬似ラ
ンダムパルス発生回路、10……LED表示体。
示す図、第2図は該LED表示体の制御用ICを
示すブロツク構成図、第3図は該制御用ICの発
振回路の具体的な回路構成を示す図、第4図は上
記制御用ICの駆動回路の具体的な回路構成を示
す図、第5図は上記制御用ICの擬似ランダムパ
ルス発生回路の具体的な回路構成を示す図、第6
図は従来のクリスマスツリー用電飾装置を示す図
である。 1a,1b……リード、2……LEDチツプ、
3……ワイヤ、3a……スルーホール、4……封
止樹脂、5a……絶縁層、5b……絶縁基板、6
a,6b……第1、第2の制御用IC、7……発
振回路、8a,8b……駆動回路、9……擬似ラ
ンダムパルス発生回路、10……LED表示体。
Claims (1)
- 【実用新案登録請求の範囲】 (1) LEDチツプと該LEDチツプを点滅駆動
させる制御用ICとを一体に樹脂封止してなるこ
とを特徴とするLED表示体。 (2) 上記制御用ICは逆L字状のリードの上部
水平辺上に搭載されており、上記LEDチツプは
該制御用IC上に絶縁層を介して配置されている
ことを特徴とする実用新案登録請求の範囲第1項
記載のLED表示体。 (3) 上記LEDチツプ及び制御用ICは、一対
の真直ぐな各リードの上端に取り付けられた絶縁
基板の表面及び裏面に取り付けられ、かつ該絶縁
基板に形成されたスルーホールを介して相互に電
気的に接続されていることを特徴とする実用新案
登録請求の範囲第1項記載のLED表示体。 (4) 上記制御用ICは発振回路と、その出力を
受けて上記LEDチツプを一定周期で点滅させる
駆動回路とからなるものであることを特徴とする
実用新案登録請求の範囲第1項ないし第3項のい
ずれかに記載のLED表示体。 (5) 上記制御用ICは発振回路と、該発振回路
の出力を受けて擬似ランダムパルスを発生させる
パルス発生回路と、該擬似ランダムパルスにより
上記LEDチツプを擬似ランダム周期で点滅させ
る駆動回路とからなることを特徴とする実用新案
登録請求の範囲第1項ないし第3項のいずれかに
記載のLED表示体。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987137167U JPS6441155U (ja) | 1987-09-07 | 1987-09-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987137167U JPS6441155U (ja) | 1987-09-07 | 1987-09-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6441155U true JPS6441155U (ja) | 1989-03-13 |
Family
ID=31398346
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987137167U Pending JPS6441155U (ja) | 1987-09-07 | 1987-09-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6441155U (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05347434A (ja) * | 1992-06-12 | 1993-12-27 | Sharp Corp | 抵抗内蔵型発光装置 |
JP2016213417A (ja) * | 2015-05-13 | 2016-12-15 | ローム株式会社 | 半導体発光装置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS532174B2 (ja) * | 1973-09-21 | 1978-01-26 | ||
JPS5825287A (ja) * | 1982-07-12 | 1983-02-15 | Mitsubishi Electric Corp | 半導体感光発光素子 |
JPS6070784A (ja) * | 1983-09-27 | 1985-04-22 | Sharp Corp | 発光ダイオ−ド表示装置 |
-
1987
- 1987-09-07 JP JP1987137167U patent/JPS6441155U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS532174B2 (ja) * | 1973-09-21 | 1978-01-26 | ||
JPS5825287A (ja) * | 1982-07-12 | 1983-02-15 | Mitsubishi Electric Corp | 半導体感光発光素子 |
JPS6070784A (ja) * | 1983-09-27 | 1985-04-22 | Sharp Corp | 発光ダイオ−ド表示装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05347434A (ja) * | 1992-06-12 | 1993-12-27 | Sharp Corp | 抵抗内蔵型発光装置 |
JP2016213417A (ja) * | 2015-05-13 | 2016-12-15 | ローム株式会社 | 半導体発光装置 |
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