JPS644038A - Mounting structure of integrated circuit - Google Patents

Mounting structure of integrated circuit

Info

Publication number
JPS644038A
JPS644038A JP62159188A JP15918887A JPS644038A JP S644038 A JPS644038 A JP S644038A JP 62159188 A JP62159188 A JP 62159188A JP 15918887 A JP15918887 A JP 15918887A JP S644038 A JPS644038 A JP S644038A
Authority
JP
Japan
Prior art keywords
integrated circuit
lead frame
pad
package
cap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62159188A
Other languages
Japanese (ja)
Inventor
Hiroaki Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62159188A priority Critical patent/JPS644038A/en
Publication of JPS644038A publication Critical patent/JPS644038A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To mount an integrated circuit without an intermediary of a shock absorbing material by a method wherein a cap where the integrated circuit is mounted on its rear in such a way that a lead frame of the circuit can be used as a connection terminal is mounted on a ceramic package. CONSTITUTION:A lead frame 2 of an integrated circuit 3 according to a tape carrier system is cut to a prescribed length and a prescribed shape. An opening part of a cap 1 to which the integrated circuit 3 has been fixed is fixed to a ceramic package 4 by using a glass sealing material 5 and is sealed airtightly. The lead frame 2 is extracted to the outside from an airtightly sealed part, and is connected to a pad 6 for lead frame connection use of the package 4. The pad 6 is connected to a pad 8 for external connection use by using an internal conductor pattern 7 of the package 4. By this setup, a production process is simplified and the quality is improved.
JP62159188A 1987-06-26 1987-06-26 Mounting structure of integrated circuit Pending JPS644038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62159188A JPS644038A (en) 1987-06-26 1987-06-26 Mounting structure of integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62159188A JPS644038A (en) 1987-06-26 1987-06-26 Mounting structure of integrated circuit

Publications (1)

Publication Number Publication Date
JPS644038A true JPS644038A (en) 1989-01-09

Family

ID=15688236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62159188A Pending JPS644038A (en) 1987-06-26 1987-06-26 Mounting structure of integrated circuit

Country Status (1)

Country Link
JP (1) JPS644038A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998018164A1 (en) * 1996-10-17 1998-04-30 Seiko Epson Corporation Semiconductor device, method for manufacturing the same, circuit board, and flexible substrate
US8497999B2 (en) 1999-06-23 2013-07-30 Canon Kabushiki Kaisha Information processing apparatus and method for displaying a preview image

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998018164A1 (en) * 1996-10-17 1998-04-30 Seiko Epson Corporation Semiconductor device, method for manufacturing the same, circuit board, and flexible substrate
US6482673B2 (en) 1996-10-17 2002-11-19 Seiko Epson Corporation Semiconductor device, method of making the same, circuit board, flexible substrate, and method of making substrate
US6727595B2 (en) 1996-10-17 2004-04-27 Seiko Epson Corporation Semiconductor device, method of making the same, circuit board, and flexible substrate
US8497999B2 (en) 1999-06-23 2013-07-30 Canon Kabushiki Kaisha Information processing apparatus and method for displaying a preview image

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