JPS6439556U - - Google Patents

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Publication number
JPS6439556U
JPS6439556U JP13448187U JP13448187U JPS6439556U JP S6439556 U JPS6439556 U JP S6439556U JP 13448187 U JP13448187 U JP 13448187U JP 13448187 U JP13448187 U JP 13448187U JP S6439556 U JPS6439556 U JP S6439556U
Authority
JP
Japan
Prior art keywords
card
verification
open
reading
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13448187U
Other languages
Japanese (ja)
Other versions
JPH067414Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987134481U priority Critical patent/JPH067414Y2/en
Publication of JPS6439556U publication Critical patent/JPS6439556U/ja
Application granted granted Critical
Publication of JPH067414Y2 publication Critical patent/JPH067414Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Credit Cards Or The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図〜第５図は本考案の１実施例によるＩＣ
カードを示すもので、第１図は機能ブロツク図、
第２図ａおよびｂはＩＣカード側および親機側の
システム構成をそれぞれ示すブロツク図、第３図
はＥＥＰ―ＲＯＭのメモリエリアを示すマツプ図
、第４図および第５図はＩＣカード内のマイクロ
コンピユータ用プログラムの要部フローチヤート
図であり、第４図はメインルーチンを、また第５
図は照合サブルーチンをそれぞれ示すフローチヤ
ート図。 １……ＩＣカード、４……ＲＯＭ、５……Ｉ／
Ｏポート、７……ＥＥＰ―ＲＯＭ、１０……親機
、１ｃ，１０ｃ……シリアル通信端子、２０……
秘密コードメモリエリア、３０……照合連続失敗
カウンタエリア、４０……カードデイゼーブル情
報記憶エリア、５０……予備照合コード記憶エリ
ア、６０……データメモリエリア。 1 to 5 are ICs according to one embodiment of the present invention.
This shows the card, and Figure 1 is a functional block diagram.
Figures 2 a and b are block diagrams showing the system configurations of the IC card side and base unit side, respectively. Figure 3 is a map diagram showing the memory area of the EEP-ROM. Figures 4 and 5 are block diagrams showing the system configurations of the IC card side and the base unit side. This is a flowchart of the main part of a program for a microcomputer, and FIG. 4 shows the main routine, and FIG.
The figures are flowcharts showing each verification subroutine. 1...IC card, 4...ROM, 5...I/
O port, 7...EEP-ROM, 10...Base unit, 1c, 10c...Serial communication terminal, 20...
Secret code memory area, 30...Continuous verification failure counter area, 40...Card disable information storage area, 50...Preliminary verification code storage area, 60...Data memory area.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 不揮発性半導体メモリより成る記憶手段と、該
記憶手段に記憶されるデータの書込みおよび読出
し等のアクセスを制御するためのデータ処理制御
手段とを有し、前記記憶手段はカードアクセスツ
ールの正当性を判定するための秘密コードを記憶
する秘密コードメモリエリアと、ＩＣカード自体
が無効状態にあることを示すデータを記憶するた
めのカードデイゼーブル情報記憶エリアとを含み
、前記データ処理制御手段は前記秘密コードに対
応してカードアクセスツール側よりＩＣカードに
与えられる照合対象データと前記秘密コードとの
間の照合を判定する照合判定手段と、該照合判定
手段による照合に失敗したときに、前記カードデ
イゼーブル情報記憶エリアにカードの無効化を示
すデータを記憶書込みするためのカードデイゼー
ブル書込み制御手段とを含んで成るＩＣカードに
おいて、前記記憶手段はオープンＩＤコードを記
憶するためのオープンＩＤ記憶エリアを含み、前
記データ処理制御手段はオープンＩＤコードの読
出しを行うオープンＩＤ読出し手段と、該オープ
ンＩＤの読出しの実行に伴つてセツトされるオー
プンＩＤ読出し実行フラグと、該実行フラグがセ
ツトされているときのみ、前記照合判定手段に前
記照合対象データと前記秘密コードとの間の照合
の実行を許可する照合制御手段とを含んでいるこ
とを特徴とするＩＣカード。 It has a storage means made of a non-volatile semiconductor memory, and a data processing control means for controlling access such as writing and reading of data stored in the storage means, and the storage means is configured to check the validity of the card access tool. The data processing control means includes a secret code memory area for storing a secret code for determination, and a card disable information storage area for storing data indicating that the IC card itself is in an invalid state. a verification determination means for determining verification between verification target data given to the IC card from the card access tool side in response to the secret code and the secret code; An IC card comprising a card disable write control means for storing and writing data indicating invalidation of the card in a disable information storage area, wherein the storage means stores an open ID code for storing an open ID code. The data processing control means includes an open ID reading means for reading an open ID code, an open ID reading execution flag that is set in response to reading of the open ID, and an execution flag that is set when the execution flag is set. An IC card characterized in that the IC card includes a verification control means for permitting the verification determination means to perform verification between the verification target data and the secret code only when
JP1987134481U 1987-09-04 1987-09-04 IC card Expired - Lifetime JPH067414Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987134481U JPH067414Y2 (en) 1987-09-04 1987-09-04 IC card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987134481U JPH067414Y2 (en) 1987-09-04 1987-09-04 IC card

Publications (2)

Publication Number Publication Date
JPS6439556U true JPS6439556U (en) 1989-03-09
JPH067414Y2 JPH067414Y2 (en) 1994-02-23

Family

ID=31393274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987134481U Expired - Lifetime JPH067414Y2 (en) 1987-09-04 1987-09-04 IC card

Country Status (1)

Country Link
JP (1) JPH067414Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5975380A (en) * 1982-10-21 1984-04-28 Dainippon Printing Co Ltd Ic card
JPS60209871A (en) * 1984-04-03 1985-10-22 Omron Tateisi Electronics Co Ic card system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5975380A (en) * 1982-10-21 1984-04-28 Dainippon Printing Co Ltd Ic card
JPS60209871A (en) * 1984-04-03 1985-10-22 Omron Tateisi Electronics Co Ic card system

Also Published As

Publication number Publication date
JPH067414Y2 (en) 1994-02-23

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