JPS6439538U - - Google Patents
Info
- Publication number
- JPS6439538U JPS6439538U JP13289287U JP13289287U JPS6439538U JP S6439538 U JPS6439538 U JP S6439538U JP 13289287 U JP13289287 U JP 13289287U JP 13289287 U JP13289287 U JP 13289287U JP S6439538 U JPS6439538 U JP S6439538U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- write signal
- control circuit
- write
- peripheral device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 230000004069 differentiation Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13289287U JPS6439538U (pt) | 1987-08-31 | 1987-08-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13289287U JPS6439538U (pt) | 1987-08-31 | 1987-08-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6439538U true JPS6439538U (pt) | 1989-03-09 |
Family
ID=31390274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13289287U Pending JPS6439538U (pt) | 1987-08-31 | 1987-08-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6439538U (pt) |
-
1987
- 1987-08-31 JP JP13289287U patent/JPS6439538U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6439538U (pt) | ||
| JPH0191959U (pt) | ||
| JPS60164258U (ja) | デ−タ転送制御装置 | |
| JPH0478843U (pt) | ||
| JPS62256160A (ja) | プロセツサ間レジスタの同時アクセス防止方式 | |
| JPS6356451U (pt) | ||
| JPS5819341U (ja) | グラフイツク・デイスプレイ装置 | |
| JPS5850775U (ja) | 受信装置 | |
| JPS63114348U (pt) | ||
| JPS59165040U (ja) | デ−タ出力制御装置 | |
| JPS6235459U (pt) | ||
| JPS5863633U (ja) | 時計制御回路 | |
| JPS61285556A (ja) | メモリ書込み装置 | |
| JPH0340057A (ja) | データ転送装置 | |
| JPS59108945U (ja) | 伝送記録装置 | |
| JPS61163400U (pt) | ||
| JPH023853A (ja) | Ｃｐｕのインタフェース方法 | |
| JPS59118036U (ja) | デ−タ入力回路 | |
| JPS6095653U (ja) | デ−タバス制御装置 | |
| JPH0166697U (pt) | ||
| JPS59192755U (ja) | エラステイツク・ストア回路 | |
| JPS62169858U (pt) | ||
| JPS617175U (ja) | 画像表示装置 | |
| JPH01127040U (pt) | ||
| JPH01144944U (pt) |